Delay of the potential-induced degradation of n-type crystalline silicon photovoltaic modules by the prior application of reverse bias

Abstract

We investigated the influence of the pre-application of reverse bias on the potential-induced degradation (PID) of n-type front-emitter (n-FE) crystalline Si (c-Si) photovoltaic modules. Applying a prior positive reverse bias to n-FE cells delays charge-accumulation-type PID (PID-1), decreases in short-circuit current density (Jsc) and open-circuit voltage (Voc). The prior positive bias accumulation may accumulate negative charges in the SiNx, which leads to an increase in a duration for the positive charge accumulation by the PID test applying a negative bias. We also found that sufficiently long prior positive bias application results in the delay of PID-2, a fill factor (FF) reduction by the incursion of Na ions into the depletion region of the p–n junction of n-FE cells.