2012
DOI: 10.1051/epjap/2012110374
|View full text |Cite
|
Sign up to set email alerts
|

Delay modeling of high-speed distributed interconnect for the signal integrity prediction

Abstract: Abstract:A relevant modelling method of distributed interconnect line for the high-speed signal integrity (SI) application is introduced in this paper. By using the microwave and transmission line (TL) theory, the interconnect lines are assumed as its distributed RLC-model. Then, based-on the transfer matrix analysis, the second order global transfer function of the interconnect network comprised of the TL driven by voltage source including its internal resistance and the impedance load is expressed. Thus, … Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
4
1

Citation Types

0
21
0

Year Published

2012
2012
2021
2021

Publication Types

Select...
5
3

Relationship

0
8

Authors

Journals

citations
Cited by 31 publications
(21 citation statements)
references
References 41 publications
0
21
0
Order By: Relevance
“…The electrical equivalent circuit of the atom probe excitation system understudy is mainly composed of TL driven by a voltage source herein denoted v in with internal impedance Z s ended by output load impedance Z L as proposed in [2,3]. The input and output currents delivered by the source and propagating across the load are denoted as i in and i out , respectively.…”
Section: Behavioral Model Of the E-pulser Systemmentioning
confidence: 99%
See 1 more Smart Citation
“…The electrical equivalent circuit of the atom probe excitation system understudy is mainly composed of TL driven by a voltage source herein denoted v in with internal impedance Z s ended by output load impedance Z L as proposed in [2,3]. The input and output currents delivered by the source and propagating across the load are denoted as i in and i out , respectively.…”
Section: Behavioral Model Of the E-pulser Systemmentioning
confidence: 99%
“…Due to the interconnect lines unmatching, several electromagnetic (EM) and electrical phenomena need to be predicted during the characterization of high speed signals as electrical fast transient (EFT) and surge voltages/currents behaviors. Owing to such an effect, various numerical and analytical modelling methods of interconnect lines for high speed signal sharing were developed [3][4][5][6]. Those easy and fast computational methods are subsequently integrated by electronic design engineers in their circuit models in order to predict the signal integrity (SI) especially when the operating frequency is higher [2][3][4][5][6].…”
Section: Introductionmentioning
confidence: 99%
“…The neutralization technique proposed in [57] is interesting for reducing the degradation caused the electrical interconnections in the printed circuit board (PCB) and microelectronic systems instead of the technique based on the use of repeaters [58]. With the increase of the operating data speed, the microelectronic signals propagating through the PCB interconnections and wireless propagation channels are victim of undesired degradations [59][60][61][62][63][64]. In circuit approach, this later can be usually modelled by RC-, LCand RLC-networks.…”
Section: Introductionmentioning
confidence: 99%
“…Due to the unceasing increase of the electronic system integration, the modern high-speed electronic equipment meets different technological roadblocks due to the interconnect complexity [10][11][12][13][14][15]. In addition to the investigation on the apparition of electromagnetic interferences (EMI) and electromagnetic compatibility (EMC), many works stating the power loss and the interconnect delay effects for example, in the RF/digital devices were done [6,[16][17][18][19][20][21][22][23]. Because of the undesired interconnection perturbations, it has been evidenced that the interconnect delays of high speed digital IC dominate widely gate delays [5].…”
Section: Introductionmentioning
confidence: 99%
“…During the data stream transmission, these technological issues can be sources of signal distortions, asynchronous effects of the transmitted analog signals and erroneous symbols. So, intensive researches were performed on the modeling of the interconnect networks in order to predict the signal integrity (SI) [9,[11][12][13][14][15][17][18][19][20][21][22][23][24]. To minimize the cost and energy consumption and also for sharing data and clock signals through multipath circuits can be composed of ICs packaged in different levels this later is fundamental [25][26][27][28].…”
Section: Introductionmentioning
confidence: 99%