Timing data collection through memory compiler characterization is an integral part of memory compiler development. Simulations are run on an exhaustive instances list to cover the whole compiler range. Full characterization taxes resources immensely, both in terms of time and disk space. This paper focusses on on-the-fly donut creation methodology for the target memory compiler instance. In donut creation flow, nontiming critical bitcells are removed from the bitcell array while timing-critical bitcells are preserved. For an 80kB memory instance with close to 5 million transistors, RC extraction was not feasible using normal simulation machines. Comprehensive analysis, which earlier was impractical due to the difficulty of extracting the biggest (80kB) instance, was completed with the help of donut generation. Using on-the-fly donut formation flow, RC extracted netlist was reduced by 75% and accuracy of timing simulations increased within 2%