Delay Analysis of a  Real-Time Hard Reconfigurable Synchrophasor Synchronization Gateway

Vanfretti, Luigi; Adhikari, Prottay M.

doi:10.2316/p.2019.859-008

Cited by 1 publication

(5 citation statements)

References 4 publications

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“…The authors of [24] reported the architecture for the Synchrophasor Synchronization Gateway (SSG) and introduced the hardware and software associated with the implementation. On the software level, the SSG uses the C-based Khorjin library reported in [25] to parse multiple and concurrent PMU data streams.…”

Section: Related Workmentioning

confidence: 99%

“…In [24], the authors proposed a framework where multiple concurrent instances of the same dynamically linked library (DLL) were used to parse multiple PMU streams in real time. This procedure includes both deciphering the measurement data and extracting the synchrophasor configuration information.…”

Section: Related Workmentioning

confidence: 99%

“…The communication link requires bidirectional capabilities as the PMUs send header information, measurement data and configuration information; they also receive a command message to enable or disable the data transmission. The research presented in [24,33] utilizes multiple instances of this Khorjin thread to facilitate the real-time reception and parsing of synchrophasor data streamed from multiple sources. Finally, it is important to note that while the current research utilized the same Khorjin-based SSG architecture reported in [24,33], the major contribution of the current paper lies in the extension of the SSG architecture into the domains of secondary control actions and their validation by using real-time CHIL experiments by using a microgrid model with DERs, where the secondary controller drives a Battery Energy Storage System (BESS).…”

Section: Related Workmentioning

confidence: 99%

“…The authors of [25] presented the Khorjin library, which receives, extracts and parses a C37.118.2 data stream before feeding the information to subscriber applications. The authors of [24,33] demonstrated the data unwrapping and time synchronization functionalities on the real-time embedded system (host), utilizing multiple instances of Khorjin extracting data from multiple incoming concurrent PMU streams in parallel.…”

Section: Architecture and Experimental Setup 21 Controller Architecturementioning

confidence: 99%

“…The delay between the time when a synchrophasor packet is generated and when that particular packet is received at the SSGC end can be computed by sharing the respective time stamps. This procedure is explained in detail by the authors of [24].…”

Section: Network Tampering By Introducing Fixed Delaymentioning

confidence: 99%

See 4 more Smart Citations

Real-Time Control of a Battery Energy Storage System Using a Reconfigurable Synchrophasor-Based Control System

Adhikari,

Vanfretti,

Chang

et al. 2023

Energies

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Synchrophasor-driven smart grid applications aiming to orchestrate a diverse set of Distributed Energy Resources (DERs) require extensive infrastructure including substantial instrumentation hardware, communication network extensions and controller installations for coordinated operation. This can make the overall installation expensive. Additionally, due to the computational complexity and data-intensive nature of the PDC functionality, most of the existing PDC implementations are on a purely software level, making them unsuitable for the real-time applications. To address this, the current paper proposes an alternate architecture for the real-time synchrophasor-based control of DER applications (e.g., microgrids) incorporating a centralized synchronization hardware designed to replace aggregation Phasor Data Concentrators (PDCs) and supplementary control algorithms into a singular reconfigurable hardware. This particular hardware is termed a Synchrophasor Synchronization Gateway and Controller (SSGC). The robustness of the proposed architecture is tested by using real-time (RT) Controller Hardware-In-the-Loop (CHIL) simulation-based experiments by manipulating the communication network that connects the SSGC with multiple Phasor Measurement Unit (PMU) streams broadcasting data through the IEEE C37.118.2 protocol in real time. These PMU streams were generated by using a real-time microgrid model running on a Typhoon HIL 604 simulator. To manipulate the communication interface between the proposed SSGC hardware and the PMU streams, a configurable Wide Area Network (WAN) emulator and communication network impairment appliance deployed in the Candela Technologies CT910 external hardware was utilized. The real-time control system was expanded by incorporating a low-pass filter to eliminate the potential overswitching of a Battery Energy Storage System (BESS). The proposed architecture demonstrated a reliable performance under ideal to moderately tampered communication networks. However, under a significantly corrupted network, the performance of this architecture is acutely affected.

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Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%