Defectivity and particle reduction for mask life extension, and imprint mask replication for high-volume semiconductor manufacturing

Emoto, Keiji; Sakai, Fumio; Sato, Chiaki; Takabayashi, Yukio; Nakano, Hitoshi; Takabayashi, Tsuneo; Yamamoto, Kazuhisa; Hattori, Tadashi; Hiura, Mitsuru; Ando, Toshiaki; Kawanobe, Yoshio; Azuma, Hisanobu; Iwanaga, Takehiko; Choi, Jin; Aghili, Ali; Jones, Christopher E.; Irving, J. W.; Fletcher, Brian; Ye, Zhengmao

doi:10.1117/12.2219036

Cited by 8 publications

(2 citation statements)

References 8 publications

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“…Careful controlling of the system during separation can mitigate these defects. To reduce the particle defects, which are located on the wafer and mask, some approaches have been taken including air curtain system and polishing [55,56]. Recently, it has been revealed that defectivity level has been lessened to below 1 pcs per cm 2 at a throughput of 15 wafers per hour [57].…”

Section: Status and Challengesmentioning

confidence: 99%

Promising Lithography Techniques for Next-Generation Logic Devices

2018

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Continuous rapid shrinking of feature size made the authorities to seek alternative patterning methods as the conventional photolithography comes with its intrinsic resolution limit. In this regard, some promising techniques have been proposed as next-generation lithography (NGL) that has the potentials to achieve both high-volume production and very high resolution. This article reviews the promising NGL techniques and introduces the challenges and a perspective on future directions of the NGL techniques. Extreme ultraviolet lithography (EUVL) is considered as the main candidate for sub-10-nm manufacturing, and it could potentially meet the current requirements of the industry. Remarkable progress in EUVL has been made and the tools will be available for commercial operation soon. Maskless lithography techniques are used for patterning in R&D, mask/mold fabrication and low-volume chip design. Directed self-assembly has already been realized in laboratory and further effort will be needed to make it as NGL solution. Nanoimprint lithography has emerged attractively due to its simple process steps, high throughput, high resolution and low cost and become one of the commercial platforms for nanofabrication. However, a number of challenging issues are waiting ahead, and further technological progresses are required to make the techniques significant and reliable to meet the current demand. Finally, a comparative study is presented among these techniques.

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Section: Status and Challengesmentioning

confidence: 99%

Promising Lithography Techniques for Next-Generation Logic Devices

2018

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“…In order to reduce particles on the wafer and mask, we have introduced a primary air curtain system into our NIL tool, as shown in Figure 8 [17].…”

Section: Particle Addersmentioning

confidence: 99%

Nanoimprint System for High Volume Semiconductor Manufacturing; Requirement for Resist Materials

Ito

Emoto

Takashima

et al. 2016

J. Photopol. Sci. Technol.

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Nanoimprint lithography (NIL) has been shown to be an effective technique for replication of nano-scale features. Jet and Flash* Imprint Lithography (J-FIL*) involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is cross-linked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate.Criteria specific to any lithographic process for the semiconductor industry include overlay, throughput and defectivity. J-FIL technology requires a photo-curable chemical composition as a dedicated resist material which satisfies all the requirements of J-FIL technology. This includes jetting performance, resist spread and relief image filling, UV sensitivity, separation and post-process durability. Because the J-FIL resist material interacts much more strongly with the equipment via the mask than other conventional photo-resist materials, it plays a significant role in the overall J-FIL process and impacts criteria such as overlay, defectivity and throughput.The purpose of this paper is to describe the technology advancements made in overlay, throughput and defectivity and to introduce the FPA-1200NZ2C cluster system designed for high volume manufacturing of semiconductor devices. Included in the discussion are some of the key imprint resist characteristics that impact J-FIL performance. *Jet and Flash Imprint Lithography and J-FIL are trademarks of Molecular Imprints Inc.

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Nanoimprint Lithography

Schift

2017

Springer Handbook of Nanotechnology

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Defectivity and particle reduction for mask life extension, and imprint mask replication for high-volume semiconductor manufacturing

Cited by 8 publications

References 8 publications

Promising Lithography Techniques for Next-Generation Logic Devices

Promising Lithography Techniques for Next-Generation Logic Devices

Nanoimprint System for High Volume Semiconductor Manufacturing; Requirement for Resist Materials

Nanoimprint Lithography

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