Defect states at III-V semiconductor oxide interfaces

Lin, Liang; Robertson, John

doi:10.1063/1.3556619

Cited by 132 publications

(90 citation statements)

References 28 publications

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“…5,6,9 As pointed by Robertson et al, though a perfect trivalent oxide/GaAs interface is free of gap states, the presence of specific interface defects, As-As dimers, and dangling bonds of Ga and As contributes to the formation of important gap states. [10][11][12][13][14] This understanding strongly suggests that the elimination or passivation of these defect states is mandatory to bring out superior transport properties of GaAs. One solution is the use of an ultra-high vacuum (UHV) process, whereby both III-V epitaxy and dielectric deposition are performed under UHV.…”

Section: -2 Aoki Et Almentioning

confidence: 99%

“…The concept of charge neutral level (CNL), above which the trap states are considered as acceptors (electron traps) and below which the trap states are considered as donors (hole traps), can roughly explain the improvements on (111)A. 66 Crystal orientation influences the defect type and population near the surface, e.g., reduced As-related defects on a Ga-rich (111)A surface, 12 which can cause a CNL shift. An upward shift in the CNL corresponds to a reduction in the effective amount of acceptor-type states in DIGS.…”

Section: F Influence Of Crystal Orientationmentioning

confidence: 99%

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Electrical properties of GaAs metal–oxide–semiconductor structure comprising Al2O3 gate oxide and AlN passivation layer fabricated in situ using a metal–organic vapor deposition/atomic layer deposition hybrid system

et al. 2015

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This paper presents a compressive study on the fabrication and optimization of GaAs metal–oxide–semiconductor (MOS) structures comprising a Al2O3 gate oxide, deposited via atomic layer deposition (ALD), with an AlN interfacial passivation layer prepared in situ via metal–organic chemical vapor deposition (MOCVD). The established protocol afforded self-limiting growth of Al2O3 in the atmospheric MOCVD reactor. Consequently, this enabled successive growth of MOCVD-formed AlN and ALD-formed Al2O3 layers on the GaAs substrate. The effects of AlN thickness, post-deposition anneal (PDA) conditions, and crystal orientation of the GaAs substrate on the electrical properties of the resulting MOS capacitors were investigated. Thin AlN passivation layers afforded incorporation of optimum amounts of nitrogen, leading to good capacitance–voltage (C–V) characteristics with reduced frequency dispersion. In contrast, excessively thick AlN passivation layers degraded the interface, thereby increasing the interfacial density of states (Dit) near the midgap and reducing the conduction band offset. To further improve the interface with the thin AlN passivation layers, the PDA conditions were optimized. Using wet nitrogen at 600 °C was effective to reduce Dit to below 2 × 1012 cm−2 eV−1. Using a (111)A substrate was also effective in reducing the frequency dispersion of accumulation capacitance, thus suggesting the suppression of traps in GaAs located near the dielectric/GaAs interface. The current findings suggest that using an atmosphere ALD process with in situ AlN passivation using the current MOCVD system could be an efficient solution to improving GaAs MOS interfaces.

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Section: -2 Aoki Et Almentioning

confidence: 99%

Section: F Influence Of Crystal Orientationmentioning

confidence: 99%

Electrical properties of GaAs metal–oxide–semiconductor structure comprising Al2O3 gate oxide and AlN passivation layer fabricated in situ using a metal–organic vapor deposition/atomic layer deposition hybrid system

et al. 2015

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“…1 This is due to their advantageous material properties that can include high electron mobility, narrow direct band gap, and lattice matching with ternary or quaternary III-V compounds. [2][3][4][5][6][7] These properties mean that III-V materials are important for nanoelectronic devices (for example, GaAs or InAs), 2 for lasers (direct band gap materials such as InP), 8 and radiation detectors (indirect band gap materials such as AlAs or AlSb).…”

mentioning

confidence: 99%

Antisites in III-V semiconductors: Density functional theory calculations

Chroneos

Tahini

Schwingenschlögl

et al. 2014

Journal of Applied Physics

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“…Nevertheless, the band offsets of heterostructures provided by GGA are in general qualitatively similar to those by higher level hybrid functionals, while the latters are significantly more time consuming than GGA as the number of atoms increases to tens or hundreds. GGA has been widely used to study the interfacial properties, e.g., interfacial dopant [39] and interlayer [40,41] tunable effective work function (EWF), interfacial defects induced Fermi level pinning [42,43]. In effect, GGA can be considered as a useful rule of thumb in many cases if the trends rather than the absolute values are of interest, as the scope of the study of interfacial dopants in this work, where only GGA functional is used to demonstrate the trends of band offset shift.…”

Section: Methodsmentioning

confidence: 99%

Identifying and Engineering the Electronic Properties of the Resistive Switching Interface

Hong

Zhang

Shi

2015

Journal of Elec Materi

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We study the electronic structures of TiO2/Ti4O7 and Ta2O5/TaO2 interfaces using the screened exchange (sX-LDA) functional. Both of these bilayer structures are useful infrastructures for high performance RRAMs. We find that the system Fermi energies of both interfaces are just above the conduction band edge of the corresponding stoichiometric oxides. According to the charge transition levels of the oxygen vacancies, the oxygen vacancies are stabilized at the -2 charged state in both Ta2O5 and TiO2. We propose to introduce interfacial dopants to shift the system Fermi energies downward so that the +2 charged oxygen vacancy can be stable, which is important for the controlled resistive switching under the electrical field. Several dipole models are presented to account for the ability of Fermi level shift due to the interfacial dopants. IntroductionMetal oxides have been widely used in the emerging nonvolatile memory technologies like the resistive random access memory (RRAM) [1,2] and the memristor [3][4][5]. Both of these devices are characterized by the reversible resistance switching (RS) which is commonly due to the growth and rupture of the conducting filaments (CFs) consisting of charged oxygen vacancies (Ov) [6][7][8]. Numerous reports have been published on metal oxides operating through this RS mechanism like TiO2 [9,10], Ta2O5 [11], SrTiO3 [12], NiO [13,14], and so on. Among various oxide candidates, TiO2 demonstrates both unipolar [9,10] and bipolar [15,16] RS. Transmission electron microscopy of the unipolar RS TiO2 has suggested that the CFs in unipolar switching are composed of Magneli phase Ti4O7 [10]. Recently, real time identification of the evolution of Ti4O7 CFs in TiO2 has been reported [17]. However, the problem of TiO2 is the co-existence of more than one stable substoichiometric Magneli phases which is unfavorable for long device endurance [18]. On the other hand, Ta2O5 keeps the longest endurance record among these oxides [11] and it operates in a bipolar manner. The long endurance of Ta2O5 based devices is partly attributed to only one stable substoichiometric phase, Ta, under 1000°C [18] despite of large amount of metastable substoichiometric phases such as TaO2. The in situ observation of CFs in Ta2O5 has recently been reported [19].One of the biggest challenges of these oxide based devices is the requirement for the electroforming process [20,21]. This could induce physical damages to the device due to oxygen gas release [22]. Besides, wide variance of device properties depends on the details of the electroforming which are yet to be understood. Therefore, it is essential to achieve electroforming free RS so as to eliminate the device variance for applicable computer circuits [20,21].

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Defect states at III-V semiconductor oxide interfaces

Cited by 132 publications

References 28 publications

Electrical properties of GaAs metal–oxide–semiconductor structure comprising Al2O3 gate oxide and AlN passivation layer fabricated in situ using a metal–organic vapor deposition/atomic layer deposition hybrid system

Electrical properties of GaAs metal–oxide–semiconductor structure comprising Al2O3 gate oxide and AlN passivation layer fabricated in situ using a metal–organic vapor deposition/atomic layer deposition hybrid system

Antisites in III-V semiconductors: Density functional theory calculations

Identifying and Engineering the Electronic Properties of the Resistive Switching Interface

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