Defect generation in electronic devices under plasma exposure: Plasma-induced damage

Abstract

The increasing demand for higher performance of ULSI circuits requires aggressive shrinkage of device feature sizes in accordance with Moore's law. Plasma processing plays an important role in achieving fine patterns with anisotropic features in metal-oxide-semiconductor field-effect transistors (MOSFETs). This article comprehensively addresses the negative aspect of plasma processingplasma-induced damage (PID). PID naturally not only modifies the surface morphology of materials but also degrades the performance and reliability of MOSFETs as a result of defect generation in the materials. Three key mechanisms of PID, i.e., physical, electrical, and photon-irradiation interactions, are overviewed in terms of modeling, characterization techniques, and experimental evidence reported so far. In addition, some of the emerging topicscontrol of parameter variability in ULSI circuits caused by PID and recovery of PIDare discussed as future perspectives.

Improvement of the plasma‐induced defect generation model in Si substrates and the optimization design framework

“…Figure shows the detailed structures of the damaged region under various ion doses D ion1 , D ion2 , and D ion3 , accompanied by the result by a molecular dynamics (MD) simulation on the top. Some of the MD simulations results regarding the damaged layer formation have been presented elsewhere . The MD simulation result shows the presence of Ar atoms deep in the Si substrate and the interfacial region with knocked‐on Si, O, and Ar atoms.…”

“…Some of the MD simulations results regarding the damaged layer formation have been presented elsewhere. [2,3] The MD simulation result shows the presence of Ar atoms deep in the Si substrate and the interfacial region with knocked-on Si, O, and Ar atoms. By a series of collisions, the defects are created and the mechanism is accumulated in accordance with D ion as illustrated in Figure 2b.…”

“…[1] Despite advancements in plasma processing, the degradation of material properties due to plasma exposure-plasma process-induced damage (PID)-has become a key issue. [2][3][4] In general, PID is classified on the basis of the mechanisms of its generation such as "physical damage," [5][6][7][8] "charging damage," [4,[9][10][11][12] and "radiation damage." [13][14][15][16][17] Physical damage is induced by high-energy ion bombardment on Si substrates or other material surfaces.…”

“…Plasma processing plays an important role in manufacturing present‐day microelectronics such as metal–oxide–semiconductor field‐effect transistors (MOSFETs) . Despite advancements in plasma processing, the degradation of material properties due to plasma exposure—plasma process‐induced damage (PID)—has become a key issue . In general, PID is classified on the basis of the mechanisms of its generation such as “physical damage,” “charging damage,” and “radiation damage.” Physical damage is induced by high‐energy ion bombardment on Si substrates or other material surfaces.…”

Comparative study of two atomic layer etching processes for GaN

“…Such plasma etching induces a lot of surface damage that is detrimental to the device performances; see the progress review by Eriguchi. 3 For example, the damage induced during the fabrication process of a recessed gate for an AlGaN/GaN field effect transistor could drastically reduce the gate breakdown voltage. 4 Similarly, when dealing with optoelectronic devices, point defects induced by the etching can act as Shockley-Read-Hall nonradiative centers for the carriers 5 and/or as surface charged traps, which leads to Fermi-level pinning.…”