2022
DOI: 10.1016/j.mtnano.2022.100226
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Defect generation in a data-storage layer by strong ion bombardment for multilevel non-volatile memory applications

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Cited by 1 publication
(2 citation statements)
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“…[ 12 ] Flash memory and ferroelectric field‐effect transistor (FeFET) exhibit outstanding CMOS compatibility and a wide conductance range; however, flash memory requires high operation voltage, and FeFET has poor fatigue characteristics, which results in cycle‐to‐cycle variation. [ 13–15 ] To overcome the limitations of non‐volatile‐memory‐based synapse devices, metal–oxide–semiconductor field‐effect transistors (MOSFETs) were proposed as an alternative approach. [ 16 ] MOSFET synapse devices showed excellent linearity, but they required continuous refresh operations due to the high off current, resulting in high power consumption.…”
Section: Introductionmentioning
confidence: 99%
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“…[ 12 ] Flash memory and ferroelectric field‐effect transistor (FeFET) exhibit outstanding CMOS compatibility and a wide conductance range; however, flash memory requires high operation voltage, and FeFET has poor fatigue characteristics, which results in cycle‐to‐cycle variation. [ 13–15 ] To overcome the limitations of non‐volatile‐memory‐based synapse devices, metal–oxide–semiconductor field‐effect transistors (MOSFETs) were proposed as an alternative approach. [ 16 ] MOSFET synapse devices showed excellent linearity, but they required continuous refresh operations due to the high off current, resulting in high power consumption.…”
Section: Introductionmentioning
confidence: 99%
“…[12] Flash memory and ferroelectric field-effect transistor (FeFET) exhibit outstanding CMOS compatibility and a wide conductance range; however, flash memory requires high operation voltage, and FeFET has poor fatigue characteristics, which results in cycle-tocycle variation. [13][14][15] To overcome the limitations of non-volatilememory-based synapse devices, metal-oxide-semiconductor This work presents an analog neuromorphic synapse device consisting of two oxide semiconductor transistors for high-precision neural networks. One of the two transistors controls the synaptic weight by charging or discharging the storage node, which leads to a conductance change in the other transistor.…”
mentioning
confidence: 99%