DeepNVM: A Framework for Modeling and Analysis of Non-Volatile Memory Technologies for Deep Learning Applications

Inci, Ahmet; Isgenc, Mehmet Meric; Marculescu, Diana

doi:10.23919/date48585.2020.9116263

Cited by 15 publications

(5 citation statements)

References 8 publications

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“…Comprehensive framework (CF) for Given different operating conditions, configurations, supply voltage scaling, and aging processes, an SRAM cache's availability and reliability will degrade with time described [26]. Non-Volatile Memory Technology for last-level caches that use SRAM, STT-MRAM, and SOT-MRAM technologies reported [27].…”

Section: Background Studymentioning

confidence: 99%

Improved Smart Memory Design Structure and Processor Framework for Embedded System

2024

Preprint

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Digital cameras, sensor technologies and diagnostic imaging technologies are recent additions to the ever-growing list of embedded systems applications. A substantial number of activities in current multiprocessor embedded devices are executed on common processors, and associated complicated connections are handled through shared communication networks. Non-volatile, solid-state reliable, inexpensive and high-density NAND flash memory has quickly become an essential component in embedded systems. Embedded systems designers face a formidable obstacle in the design limits imposed by embedded systems, compounded by the rising need to reduce costs and time-to-market. Hence this paper, Effective Programmable Model (EPM) with NAND flash memory has been proposed for compute-intensive embedded applications. To keep delivery costs down, the processor design uses instruction registers, while a hierarchical and decentralized data register structure is used to transport data. Instruction registers record the reuse and localization of instructions in low-cost, close-to-functional-units storage structures. A method for reducing hold power dissipation is provided by the SRAM architecture that has been presented in this paper. Using NAND storage for the code's execution space proved that our suggested architecture would work in a practical embedded setting. These structural modifications allow for better improvement in energy efficiency over previously possible embedded processors. Our proposed method achieves a high-performance ratio of 98.7%, a less throughput ratio of 16.4% and an error rate of 18.3% compared to other methods.

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Section: Background Studymentioning

confidence: 99%

Improved Smart Memory Design Structure and Processor Framework for Embedded System

2024

Preprint

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“…During the inference, after passing the image through the layers of DL, activations are checked with the saved activations of a specific layer. If the activations of a particular layer for the current query match with the activations in the cache, further [ 167,168,169,187,188,189,190,191,192,193] propagation of the activations is stopped, and the cached result is returned as the prediction. This research was applied to a VGG-16 architecture using CIFAR and yielded a 1.96× latency gain using a CPU and a 1.54× increase when using a GPU with no loss in accuracy.…”

Section: B) Model Selectionmentioning

confidence: 99%

Enabling All In-Edge Deep Learning: A Literature Review

et al. 2023

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In recent years, deep learning (DL) models have demonstrated remarkable achievements on non-trivial tasks such as speech recognition, image processing, and natural language understanding. One of the significant contributors to its success is the proliferation of end devices that acted as a catalyst to provide data for data-hungry DL models. However, computing DL training and inference is the main challenge. Usually, central cloud servers are used for the computation, but it opens up other significant challenges, such as high latency, increased communication costs, and privacy concerns. To mitigate these drawbacks, considerable efforts have been made to push the processing of DL models to edge servers (a mesh of computing devices near end devices). Moreover, the confluence point of DL and edge has given rise to edge intelligence (EI). International Electrotechnical Commission (IEC) defines EI as the concept where the data is acquired, stored, and processed utilizing edge computing with DL and advanced networking capabilities. Broadly, EI has six levels of categories based on where the training and inference of DL take place, e.g., cloud server, edge server and end devices. This survey paper focuses primarily on the fifth level of EI, called all in-edge level, where DL training and inference (deployment) are performed solely by edge servers. All in-edge is suitable when the end devices have low computing resources, e.g., Internet-of-Things, and other requirements such as latency and communication cost are important such as in mission-critical applications (e.g., health care). Besides, 5G/6G networks are envisioned to use all in-edge. Firstly, this paper presents all in-edge computing architectures, including centralized, decentralized, and distributed. Secondly, this paper presents enabling technologies, such as model parallelism, data parallelism, and split learning, which facilitates DL training and deployment at edge servers. Thirdly, model adaptation techniques based on model compression and conditional computation are described because the standard cloud-based DL deployment cannot be directly applied to all in-edge due to its limited computational resources. Fourthly, this paper discusses eleven key performance metrics to evaluate the performance of DL at all in-edge efficiently. Finally, several open research challenges in the area of all in-edge are presented. INDEX TERMS Artificial intelligence, all in-edge, deep learning, distributed systems, decentralized systems, edge intelligence I. INTRODUCTION T HE global community is increasingly becoming a datadriven environment in which end devices are generating vast quantities of data outside of the traditional data centers. International Telecommunication Union anticipates that global internet traffic per month will reach 607 Exabytes (EB) in 2025 and 5016 EB in 2030 [1]. This enormous amount of data has a positive impact on artificial intelligence (AI) applications. In particular, deep learning (DL) rely on the availability of large quantities of data for its d...

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“…Workloads worsen the memory bottleneck that lowers the overall performance of systems where deep learning models are run since neural network workloads continue to have big memory footprints and significant computational requirements to attain improved accuracy (Inci 2022;Inci et al, 2022a). As deep learning models have become more proficient in many tasks, developing smaller neural network models in terms of trainable parameters has attracted interest from many researchers in the field (Inci et al, 2022b) to support operational needs in flood forecasting (Krajewski et al, 2021;Xiang and Demir, 2022) and inundation mapping (Hu and Demir, 2021;Li et al, 2022).…”

Section: Introductionmentioning

confidence: 99%

EfficientRainNet: Smaller Neural Networks Based on EfficientNetV2 for Rainfall Nowcasting

Sit¹,

Seo²,

Demiray³

et al. 2023

Preprint

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Rainfall nowcasting provides short-term, high-resolution information on the location, intensity, and timing of rainfall, which is crucial for weather forecasting, flood warning, and emergency response. This can help people and organizations make informed decisions to mitigate the impact of severe weather events and reduce the risk of damage and loss of life. There are many attempts at tackling the problem at hand, whether it be numerical models or statistical models that also comprise deep neural networks. Even though nowcast models are quite accurate nowadays and the problem has a saturated literature, current approaches mostly focus on improving the nowcast performance while the computational burden keeps increasing. In this study, we propose EfficientRainNet, which is a convolutional neural network architecture that is based on mobile inverted residual linear bottleneck blocks with a few alterations. We show that EfficientRainNet is able to produce comparable results to those of encoder-decoder convolutional GRUs with only a fraction of the trainable parameters over a radar rainfall dataset for the State of Iowa. Also, for the most part, EfficientRainNet performs better than baselines using persistence- and optical flow-based nowcasting, along with another computational efficiency-focused neural network architecture, Small Attention UNet.

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DeepNVM: A Framework for Modeling and Analysis of Non-Volatile Memory Technologies for Deep Learning Applications

Cited by 15 publications

References 8 publications

Improved Smart Memory Design Structure and Processor Framework for Embedded System

Improved Smart Memory Design Structure and Processor Framework for Embedded System

Enabling All In-Edge Deep Learning: A Literature Review

EfficientRainNet: Smaller Neural Networks Based on EfficientNetV2 for Rainfall Nowcasting

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