Decoding of Block Codes by using Genetic Algorithms and Permutations Set

Nouh, Saïd; Chana, Idriss; Belkasmi, Mostafa

doi:10.17762/ijcnis.v5i3.428

Cited by 11 publications

(3 citation statements)

References 17 publications

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“…They have established equations that represent the exact relations between the parameters of the code n, k, t and the number of the steps • Second, to optimize and minimize the number of permutations used in the decoding. This process was done algebraically (Wolfmann, 1983) or by genetic algorithms (Nouh et al, 2013) In 2010 the authors (Key et al, 2010) decode Reed Muller codes by using permutation decoding. They applied the decoding algorithm to the first and second order Reed Muller codes.…”

Section: Fig 1: Simplified Model Of a Digital Communication Systemmentioning

confidence: 99%

Efficient Decoding Algorithm for Binary Quadratic Residue Codes Using Reduced Permutation Sets

Boualame¹,

Belkasmi²,

Chana³

2023

Journal of Computer Science

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The Quadratic Residue (QR) codes have a rich mathematic structure. Unfortunately, their Algebraic Decoding (AD) is not generalizable for all QR codes. In this study, an efficient hard decoding algorithm is proposed to generalize the decoding of the binary systematic Quadratic Residue (QR) codes. The proposed decoder corrects t erroneous bits or less, in the received word, based on a reduced set of permutations derived from the large automorphism group of QR codes. This set of permutations is applied to the received word to move the error positions and trap all of them in redundancy. Then, to evaluate the proposed method, we applied it to many binary QR codes of moderate code length starting with 17 until 113 with reducible and irreducible generator polynomials. The proposed decoder was validated by inserting all possible error patterns, that have t or less erroneous positions, as input of the proposed decoder and the output is always a correct codeword. The complexity study, in terms of the number of operations used, reveals that the light permutation decoding LPD algorithm significantly decreases decoding complexity without performance loss. So, it is qualified to be a good competitor to decode QR codes with lower lengths but is the best for QR codes with higher lengths.

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Section: Fig 1: Simplified Model Of a Digital Communication Systemmentioning

confidence: 99%

Efficient Decoding Algorithm for Binary Quadratic Residue Codes Using Reduced Permutation Sets

Boualame¹,

Belkasmi²,

Chana³

2023

Journal of Computer Science

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“…GA offers several advantages over traditional algorithms: It relies solely on the objective function's evaluation, irrespective of its characteristics (e.g., continuity, and differentiability), providing greater flexibility and applicability across diverse problem domains [20,21].…”

Section: Genetic Algorithmmentioning

confidence: 99%

Genetic Algorithm-Based Method for Discovering Involutory MDS Matrices

Bellfkih,

Nouh,

Chems Eddine Idrissi

et al. 2023

Computational and Mathematical Methods

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In this paper, we present an innovative approach for the discovery of involutory maximum distance separable (MDS) matrices over finite fields F2q, derived from MDS self-dual codes, by employing a technique based on genetic algorithms. The significance of involutory MDS matrices lies in their unique properties, making them valuable in various applications, particularly in coding theory and cryptography. We propose a genetic algorithm-based method that efficiently searches for involutory MDS matrices, ensuring their self-duality and maximization of distances between code words. By leveraging the genetic algorithm’s ability to evolve solutions over generations, our approach automates the process of identifying optimal involutory MDS matrices. Through comprehensive experiments, we demonstrate the effectiveness of our method and also unveil essential insights into automorphism groups within MDS self-dual codes. These findings hold promise for practical applications and extend the horizons of knowledge in both coding theory and cryptographic systems.

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“…we can minimize a large number of the logic gates and hardware resources. Therefore, we will have a low complexity compared to the basic and others algorithms [13][14] [15]. If we take the case of RS (255, 239), the error locator polynomial is mathematically represented as follows ( )…”

Section: Chien Search Algorithmmentioning

confidence: 99%

Design, optimization and Real Time implementation of a new Embedded Chien Search Block for Reed-Solomon (RS) and Bose-Chaudhuri-Hocquenghem (BCH) codes on FPGA Board

Wahbi

Idrissi

Roukhe

et al. 2022

Int. j. commun. netw. inf. secur.

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The development of error correcting codes has been a major concern for communications systems. Therefore, RS and BCH (Reed-Solomon and Bose, Ray-Chaudhuri and Hocquenghem) are effective methods to improve the quality of digital transmission. In this paper a new algorithm of Chien Search block for embedded systems is proposed. This algorithm is based on a factorization of error locator polynomial. i.e, we can minimize an important number of logic gates and hardware resources using the FPGA card. Consequently, it reduces the power consumption with a percentage which can reach 40 % compared to the basic RS and BCH decoder. The proposed system is designed, simulated using the hardware description language (HDL) and Quartus development software. Also, the performance of the designed embedded Chien search block for decoder RS\BCH (255, 239) has been successfully verified by implementation on FPGA board.

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Decoding of Block Codes by using Genetic Algorithms and Permutations Set

Cited by 11 publications

References 17 publications

Efficient Decoding Algorithm for Binary Quadratic Residue Codes Using Reduced Permutation Sets

Efficient Decoding Algorithm for Binary Quadratic Residue Codes Using Reduced Permutation Sets

Genetic Algorithm-Based Method for Discovering Involutory MDS Matrices

Design, optimization and Real Time implementation of a new Embedded Chien Search Block for Reed-Solomon (RS) and Bose-Chaudhuri-Hocquenghem (BCH) codes on FPGA Board

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