Decimal Floating Point for future processors

Abstract

Many new designs for Decimal Floating Point (DFP) hardware units have been proposed in the last few years. To date, only the IBM POWER6 and POWER7 processors include internal units for decimal floating point processing. We have designed and tested several DFP units including an adder, multiplier, divider, square root, and fusedmultiply-add compliant with the IEEE 754-2008 standard. This paper presents the results of using our units as part of a vector co-processor and the anticipated gains once the units are moved on chip with the main processor. WHY DECIMAL HARDWARE?Ten is the natural number base or radix for humans resulting in a decimal number system while a binary system is natural to computers.In his seminal paper [1] in 1959, Buchholz concludes that "a combination of binary and decimal arithmetic in a single computer provides a high-performance tool for many diverse applications. It may be noted that the conclusion might not be the same for computers with a restricted range of functions or with performance goals limited in the interest of economy; the difference between binary and decimal operation might well be considered too small to justify incorporating both. The conclusion does appear valid for high-performance computers regardless of whether they are aimed primarily at scientific computing, business data processing, or realtime control."Due to the limited capacities of the first integrated circuits in the 1960s and later years, most machines adopted the use of dedicated circuits for binary numbers and dropped decimal numbers. With the much higher capabilities of current processors and the large increase in financial and human oriented applications over the Internet, decimal is regaining its due place. The largest change in the recent revision of the IEEE standard for floating point arithmetic [2] is the introduction of the The project "Promoting Egypt as the first decimal Arithmetic Intellectual property cores provider for financial applications in the world" (grant number C2/S1/163) is funded by the RDI Programme through the EU-Egypt Innovation Fund (EEIF). The RDI Programme is a programme of the Ministry of Higher Education and Scientific Research funded by the European Union. decimal floating point formats and the associated operations.Simple decimal fractions such as 1/10 which might represent a tax amount or a sales discount yield an infinitely recurring number if converted to a binary representation. Hence, a binary number system with a finite number of bits cannot accurately represent such fractions. When an approximated representation is used in a series of computations, the final result may deviate from the correct result expected by a human and required by the law [3], [4]. One study [5] shows that in a large billing application such an error may be up to $5 million per year.Banking, billing, and other financial applications use decimal extensively. Such applications may rely on a low-level decimal software library or use dedicated hardware circuits to perform the basic decimal arithmetic op...

Mathematical model and implementation of rational processing

“…The programming languages and database systems include among their types the new data money or decimal to represent 10-base numeric data [2][3][4]. New processors support these formats and offer a wide instruction set for native execution [5][6][7][8][9]. Although the computational cost is superior to binary, for certain applications, most precision compensates this reduced performance.…”

Decimal Floating Point Number System

“…We will focus our attention here on designs using the conventional paradigm of CMOS digital gates although some alternative technologies [8,9] were also considered for decimal circuits at different points in time. Commercial hardware designs for decimal floating point additions were pioneered by IBM [10][11][12], followed by SilMinds [6,[13][14][15], then Fujitsu [16]. All of these commercial implementations use DPD.…”