Deadline-Aware Energy Management in Data Centers

Hasan, Cengis; Haas, Zygmunt J.

doi:10.1109/cloudcom.2016.0027

Cited by 3 publications

(2 citation statements)

References 20 publications

(20 reference statements)

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“…Many approaches have been proposed to minimize energy consumption in the data center. Hasan et al [19] formulate the problem of offline scheduling of jobs on the servers of a data center such that the total energy consumption is minimized, as a binary integer program. They also propose an online heuristic for the same problem.…”

Section: Related Workmentioning

confidence: 99%

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Energy-Aware Scheduling of Conditional Task Graphs on NoC-Based MPSoCs

Tariq¹,

Ishak²

2018

Proceedings of the 51st Hawaii International Conference on System Sciences

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We investigate the problem of scheduling a set of tasks with individual deadlines and conditional precedence constraints on a heterogeneous Network on Chip (NoC)-based Multi-Processor System-on-Chip (MPSoC) such that the total expected energy consumption of all the tasks is minimized, and propose a novel approach. Our approach consists of a scheduling heuristic for constructing a single unified schedule for all the tasks and assigning a frequency to each task and each communication assuming continuous frequencies, an Integer Linear Programming (ILP)-based algorithm and a polynomial time heuristic for assigning discrete frequencies and voltages to tasks and communications. We have performed experiments on 16 synthetic and 4 real-world benchmarks. The experimental results show that compared to the state-of-theart approach, our approach using the ILP-based algorithm and our approach using the polynomial-time heuristic achieve average improvements of 31% and 20%, respectively, in terms of energy reduction. compared to v j and traverse the same links that v j traverses. 4) If v j is a task node, compute its finish time ζ j = r j + t k,j , and insert unconditional directed edges from v j to unscheduled nodes concurrent to v j and mapped on the same processor where v j is mapped. 5) Delete v j from ReadySet and insert all ready nodes in G to ReadySet. Consider the CTG in Figure 1(b) and the MPSoC in Figure 2(a) where all the processors are identical. The execution times of tasks at the maximum processor frequency are t 1,1

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Section: Related Workmentioning

confidence: 99%

“…(given in Equation 1 , respectively and C is the sum of energy consumption of nodes in V opt . The ILP problem is formulated as follows: 14and (15) collectively define the deadline constraints, Equations (16), (17), (18) and (19) collectively define the precedence constraints.…”

Section: Ilp-based Algorithmmentioning

confidence: 99%