DC-to-20-GHz MMIC multibit digital attenuators with on-chip TTL control

Khabbaz, B.; Pospishil, A.; Singh, H.P.

doi:10.1109/4.156454

Cited by 22 publications

(5 citation statements)

References 5 publications

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“…3. The chip size was reduced to 1.4ｘ0.9 mm 2 by using the multi-layer process compared to that of GaAs MESFET, pHEMT and SiGe PIN attenuators [2], [5], [6].…”

Section: Circuit Configurationmentioning

confidence: 99%

Ku-band Compact Multi-layer Monolithic Microwave Digital Attenuator using InP/InGaAs PIN Diodes

Eom¹,

Yang²,

Choi³

et al. 2007

Extended Abstracts of the 2007 International Conference on Solid State Devices and Materials

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“…3. The chip size was reduced to 1.4ｘ0.9 mm 2 by using the multi-layer process compared to that of GaAs MESFET, pHEMT and SiGe PIN attenuators [2], [5], [6].…”

Section: Circuit Configurationmentioning

confidence: 99%

Ku-band Compact Multi-layer Monolithic Microwave Digital Attenuator using InP/InGaAs PIN Diodes

Eom¹,

Yang²,

Choi³

et al. 2007

Extended Abstracts of the 2007 International Conference on Solid State Devices and Materials

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“…Moreover, especially when cascading multi-stage units, the inter-stage impedance mismatch leads to further worsening of the property. In order to address this issue, the literature [ 20 , 21 , 22 , 23 ] elucidates the compensation methods and effects of π-type, T-type, bridge T-type and distributed structures, and verifies the principle under different technologies. Nevertheless, this solution still suffers from a high attenuator IL due to the presence of the transistor lossy resistance R on in the reference state, which is the reason why switching path designs should be adopted with caution [ 5 ].…”

Section: Introductionmentioning

confidence: 99%

A 10–20 GHz 6-Bit High-Accuracy Digital Step Attenuator with Low Insertion Loss in 0.15 µm GaAs p-HEMT Technology

He,

Yu,

Chen

et al. 2023

Micromachines

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In a beamforming circuit for a modern broadband phased-array system, high accuracy and compactness have received sufficient attention as they are directly related to side lobe level and fabrication cost, respectively. In order to meet the low phase error required, this paper proposed an ultra-broadband 6-bit digital step switched-type attenuator (STA) with capacitive/inductive compensation networks. Compared to the conventional methods, the proposed technique employs an improved simplified T-structure with capacitive compensation networks, which simultaneously achieves low insertion loss and high-accuracy amplitude/phase control. In addition, on-chip level shifting circuit is integrated to avoid complex control schemes. The strategy of prioritizing return loss is adopted to alleviate the performance degradation caused by impedance mismatch after cascade. As a proof-of-principle demonstration, a wideband 6-bit STA with core area of only 0.5 mm × 1.8 mm was designed via 0.15-micrometer GaAs pHEMT technology. It exhibits ultra-broadband operation with a 31.5 dB amplitude tuning range and a 0.5 dB tuning step. The insertion loss of the reference state is 4–5.3 dB. The return loss is better than 15 dB for all the 64 states. The RMS amplitude and phase errors are less than 0.2 dB and 2° over the 10 to 20 GHz.

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“…Therefore, the number of the series switches should be reduced to make compact and low loss attenuator. To reduce the insertion loss, the attenuator network incorporating switch transistors is used [3]. However, because the parasitic capacitances of on and off states in the switch transistors are very different at high frequency, it results in high phase error.…”

Section: Introductionmentioning

confidence: 99%

DC‐20 GHz 5‐BIT CMOS digital step attenuator with low insertion loss and phase error

Cho

Baek

Kim

2013

Micro & Optical Tech Letters

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This article presents a 5-bit broadband digital step attenuator with low insertion loss and phase error using a standard 0.13 lm CMOS process for the phased array antenna. The maximum attenuation of 31 dB with the LSB of 1 dB is achieved at DC-20 GHz. The measured insertion loss of the reference state is <11 dB and the input and output return losses are <À10 dB at DC-20 GHz. The root mean square (RMS) phase and amplitude errors are <2.5 and <0.7 dB, respectively. The current consumption is near zero with 1.2 V supply. The chip size is 1.04 Â 0.48 mm 2 including pads. V C 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 55:762-764, 2013; View this article online at wileyonlinelibrary.com.

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DC-to-20-GHz MMIC multibit digital attenuators with on-chip TTL control

Cited by 22 publications

References 5 publications

Ku-band Compact Multi-layer Monolithic Microwave Digital Attenuator using InP/InGaAs PIN Diodes

Ku-band Compact Multi-layer Monolithic Microwave Digital Attenuator using InP/InGaAs PIN Diodes

A 10–20 GHz 6-Bit High-Accuracy Digital Step Attenuator with Low Insertion Loss in 0.15 µm GaAs p-HEMT Technology

DC‐20 GHz 5‐BIT CMOS digital step attenuator with low insertion loss and phase error

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