Data locality and parallelism optimization using a constraint-based approach

Abstract

Cataloged from PDF version of article.Embedded applications are becoming increasingly complex and processing ever-increasing datasets. In\ud the context of data-intensive embedded applications, there have been two complementary approaches to\ud enhancing application behavior, namely, data locality optimizations and improving loop-level parallelism.\ud Data locality needs to be enhanced to maximize the number of data accesses satisfied from the higher\ud levels of the memory hierarchy. On the other hand, compiler-based code parallelization schemes require\ud a fresh look for chip multiprocessors as interprocessor communication is much cheaper than off-chip\ud memory accesses. Therefore, a compiler needs to minimize the number of off-chip memory accesses. This\ud can be achieved by considering multiple loop nests simultaneously. Although compilers address these two\ud problems, there is an inherent difficulty in optimizing both data locality and parallelism simultaneously.\ud Therefore, an integrated approach that combines these two can generate much better results than each\ud individual approach. Based on these observations, this paper proposes a constraint network (CN)-based\ud formulation for data locality optimization and code parallelization. The paper also presents experimental\ud evidence, demonstrating the success of the proposed approach, and compares our results with those\ud obtained through previously proposed approaches. The experiments from our implementation indicate\ud that the proposed approach is very effective in enhancing data locality and parallelization.\ud © 2010 Elsevier Inc. All rights reserved

Automatic Data Layout Transformations in the ExaStencils Code Generator

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