Data and edge decision feedback equalizer with >1.0-UI timing margin for both data and edge samples

Abstract

A 3-Gbps decision feedback equalizer (DFE) compensating for data and edge inter-symbol interference (ISI) is presented. A speculative architecture is employed to relieve the timing burden on the feedback signal for the DFE wherein the ISI of edge sample is compensated by speculating the DFE based on two-UI earlier data sample. Thereby, the timing margins of the DFE for data and edge ISI compensation are ensured to be larger than 1.0-UI. The proposed DFE has been implemented in a 0.13-µm CMOS technology together with a clock and data recovery (CDR) circuit. The DFE and CDR circuits occupy 0.28-mm 2 active area and the DFE consumes 18-mW from a 1.2-V supply. The RMS jitter of the recovered clock is improved from 15.6-ps to 11.9-ps by the proposed edge ISI compensating DFE.

A 0.88-pJ/bit 28Gb/s quad-rate 1-FIR 2-IIR decision feedback equalizer with 21dB loss compensation in 65nm CMOS process

“…However, the CTLE amplifies both signal and noise, causing signal-to-noise ratio (SNR) degradation. Therefore, the DFE has been proposed to eliminate longtail ISI without amplifying noise [13,14,15,16,17,18,19,20,21]. The non-linear equalizers are classified into two types: loop-unrolling DFE and n-tap direct finite impulse response (FIR) DFE.…”

“…1(a). The loopunrolling DFE alleviates strict 1UI timing constraints caused by critical path in DFE [14,15,16]. However, loop-unrolling DFE requires more summers and d flip fl-ops than n-tap direct FIR DFE, so loop-unrolling DFE consumes more power.…”

A high efficient CTLE for 12.5 Gbps receiver of JESD204B standard

“…However, The signal frequency-dependent insertion loss in serial link channels has become the major limiter as skin effect, dielectric loss and coupling loss existing in the communication channels, causing intersymbol interference (ISI) which is the bottleneck for high speed-rate and long distance communication. In order to maximize the channel bandwidth utilization rate and improve the performance of transmission system, equalization technologies such as decision feedback equalizer (DFE) [3,4,7,9] and continuous-time equalizer (CTLE) [2,5,6,8,10] have been utilized to compensate the non-ideal characteristic in the receiver side. The equalizer can compensate the useful frequency component in the Nyquist frequency range, and restrain ISI even with channel conditions and process-voltage-temperature variations.…”