“…In order to batch‐fabricate ultrathin ( D nw < 80 nm), high quality and, more importantly, self‐positioned orderly SiNW array, we have developed, in our previous works, a relatively new in‐plane solid‐liquid‐solid (IPSLS) growth mechanism, [ 33 , 34 , 35 , 36 , 37 , 38 ] where indium (In) catalyst droplets can be guided by pre‐defined edge lines to produce planar SiNWs at precise locations, by consuming precoated amorphous Si (a‐Si) precursor layer on substrate surface. Though high‐performance SiNW‐FETs have been successfully demonstrated, [ 37 , 39 , 40 , 41 , 42 , 43 ] based on the high crystallinity 1D channels grown at a rather low temperature <350 °C, a stretchable integration of these SiNW FETs onto soft elastomer thin film substrate, within a hard‐island‐protection architecture, has not been investigated.…”