Current-induced magnetization switching in atom-thick tungsten engineered perpendicular magnetic tunnel junctions with large tunnel magnetoresistance

Wang, Mengxing; Cai, Wenlong; Cao, Kaihua; Zhou, Jiaqi; Wrona, Jerzy; Peng, Shouzhong; Yang, Huaiwen; Wei, Juan; Wang, Kang; Zhang, Youguang; Langer, J.; Ocker, B.; Fert, A.

doi:10.1038/s41467-018-03140-z

Cited by 274 publications

(149 citation statements)

References 47 publications

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“…Figure 4b presents the accumulation and depression behaviors of the skyrmion synapse, where a good linearity is demonstrated. It should also be noted that we could experimentally implement the MTJ with tunneling magnetoresistance (TMR) over 200 % 32,33 , corresponding to Ron/Roff ≈ 3, which is attractive for reading of multi-state skyrmion synapse. With the same pattern recognition simulation using MNIST data set performed in Fig.…”

Section: A Potential Of Magnetic Skyrmion Artificial Synapse and Neumentioning

confidence: 99%

Skyrmion-based artificial synapses for neuromorphic computing

et al. 2020

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Since the experimental discovery of magnetic skyrmions achieved one decade ago 1 , there have been significant efforts to bring the virtual particles into all-electrical fully functional devices, inspired by their fascinating physical and topological properties suitable for future low-power electronics 2 . Here, we experimentally demonstrate such a deviceelectrically-operating skyrmion-based artificial synaptic device designed for neuromorphic computing. We present that controlled current-induced creation, motion, detection and deletion of skyrmions in ferrimagnetic multilayers can be harnessed in a single device at room temperature to imitate the behaviors of biological synapses. Using simulations, we demonstrate that such skyrmion-based synapses could be used to perform neuromorphic pattern-recognition computing using handwritten recognition data set, reaching to the accuracy of ~89%, comparable to the software-based training accuracy of ~94%. Chip-level simulation then highlights the potential of skyrmion synapse compared to existing technologies. Our findings experimentally illustrate the basic concepts of skyrmion-based fully functional electronic devices while providing a new building block in the emerging field of spintronics-based bio-inspired computing.

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Section: A Potential Of Magnetic Skyrmion Artificial Synapse and Neumentioning

confidence: 99%

Skyrmion-based artificial synapses for neuromorphic computing

et al. 2020

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“…And consequently some emerging devices based approaches are investigated in this work. [29]. MTJ is a sandwich structure consisting of two ferromagnetic (FM) layers and a tunneling barrier layer.…”

Section: A Stochastic Computingmentioning

confidence: 99%

SPINBIS: Spintronics-Based Bayesian Inference System With Stochastic Computing

Jia

Yang

Dai

et al. 2020

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Bayesian inference is an effective approach for solving statistical learning problems, especially with uncertainty and incompleteness. However, Bayesian inference is a computingintensive task whose efficiency is physically limited by the bottlenecks of conventional computing platforms. In this work, a spintronics based stochastic computing approach is proposed for efficient Bayesian inference. The inherent stochastic switching behaviors of spintronic devices are exploited to build stochastic bitstream generator (SBG) for stochastic computing with hybrid CMOS/MTJ circuits design. Aiming to improve the inference efficiency, an SBG sharing strategy is leveraged to reduce the required SBG array scale by integrating a switch network between SBG array and stochastic computing logic. A deviceto-architecture level framework is proposed to evaluate the performance of spintronics based Bayesian inference system (SPINBIS). Experimental results on data fusion applications have shown that SPINBIS could improve the energy efficiency about 12× than MTJ-based approach with 45% design area overhead and about 26× than FPGA-based approach.

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“…These operation error rates are calculated with respect to the process variations varying from 0 to 20% of the mean µ and the temperature varying from 300K to 285 400K. In these simulations, the TMR of the MTJ devices are set to 300%, the value is in accordance with the reported recently [38]. The temperature is fixed at 300K when obtained operation error rates with the process variations; while evaluating the 290 operation error rate with respect to the temperature, the process variation is set to 5%.…”

Section: Reliability and Performance Measurementmentioning

confidence: 83%

A high-reliability and low-power computing-in-memory implementation within STT-MRAM

Zhang

Deng

Cai

et al. 2018

Microelectronics Journal

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et al.. A high-reliability and low-power computing-in-memory implementation within STT-MRAM. Microelectronics Journal, Elsevier, 2018, 81, pp. AbstractIn the conventional Von-Neumann computer architecture, more energy and time are consumed by the data transport, rather than the computation itself because of the limited bandwidth between the processor and memory. Computing-in-memory (CIM) is therefore proposed to effectively address the issue by moving some specified kinds of computation into the memory. It has been proposed for several decades, however, not really used when considering the reliability and cost. With the emergence of non-volatile memories, the CIM has regained interest to tackle the issue. In this paper, we implement a CIM scheme: ComRef (Complementary Reference) within STT-MRAM (Spin Transfer Torque Magnetic Random-Access Memory), and then compare its reliability and performance with the DualRef (Dual Reference) CIM implementation. Simulation results reveal that the ComRef obviously improves the reliability by decreasing 67.1% of the operation error rate and by increasing up to 57.4% of the sensing margin. It accelerates the bitwise logic operation with cutting down 20.8% (∼41.1 ps) of the operation delay. Most importantly, it is highly energy efficient by reducing 23.4% of the average dynamic energy and 65.6% of the average static power. The ComRef provides a pathway to implement high-reliability and low-power CIM paradigm within STT-MRAM. the measurement in [4], about 200 times more energy is dissipated to access DRAM one time when compared with a floating-point computation. In summary, the limited bandwidth between the processor and the memory has been one of the most 20 critical bottlenecks to improve the system performance. This is the well-known processor-memory gap or "memory wall" [5].To address the issue, the closer integration of logic and memory has been explored widely, such as 25 logic-in-memory, processing-in-memory, in-memory processing. These explorations can be classified as two types: 1) near memory computing, 2) executing some specified kinds of computations within memory, it is called computing-in-memory (CIM). The 30CIM can reduce the amount of data transferring between the processors and the memory, to mitigate the stress of data transport on the limited bandwidth [6,7]. However, the CIM fails to tackle the issue due to some practical considerations. In 35

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Current-induced magnetization switching in atom-thick tungsten engineered perpendicular magnetic tunnel junctions with large tunnel magnetoresistance

Cited by 274 publications

References 47 publications

Skyrmion-based artificial synapses for neuromorphic computing

Skyrmion-based artificial synapses for neuromorphic computing

SPINBIS: Spintronics-Based Bayesian Inference System With Stochastic Computing

A high-reliability and low-power computing-in-memory implementation within STT-MRAM

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