Cryogenic Embedded System to Support Quantum Computing: From 5-nm FinFET to Full Processor

Abstract

Quantum computing can enable novel algorithms infeasible for classical computers. For example, new material synthesis and drug optimization could benefit if quantum computers offered more quantum bits (qubits). One obstacle for scaling up quantum computers is the connection between their cryogenic qubits at temperatures between a few millikelvin and a few kelvin (depending on qubit type) and the classical processing system on chip (SoC) at room temperature (300 K). Through this connection, outside heat leaks to the qubits and can disrupt their state. Hence, moving the SoC into the cryogenic part eliminates this heat leakage. However, the cooling capacity is limited, requiring a low-power SoC, which, at the same time, has to classify qubit measurements under a tight time constraint. In this work, we explore for the first time if an off-the-shelf SoC is a plausible option for such a task. Our analysis starts with measurements of state-of-the-art 5 nm FinFETs at 10 K and 300 K. Then, we calibrate a transistor compact model and create two standard cell libraries, one for each temperature. We perform synthesis and physical layout of a RISC-V SoC at 300 K and analyze its performance at 10 K. Our simulations show that the SoC at 10 K is plausible but lacks the performance to process more than a few thousand qubits under the time constraint.

Low Temperature (Down to 6 K) and Quantum Transport Characteristics of Stacked Nanosheet Transistors with a High-K/Metal Gate-Last Process

“…Some first-principles and density functional theory (DFT) computational methods have been utilized to calculate the electrical properties of stacked NSs and have been employed to guide the design of stacked NS devices [ 11 , 12 ]. Unfortunately, although there have been some studies on the low-temperature characteristics of NS transistors for specific channel structures and customized processes [ 13 , 14 , 15 , 16 , 17 , 18 , 19 ], there is little research on the low-temperature carrier transport characteristics of NS transistors with a general structure using mainstream fabrication processes based on HK/MG-last technologies. Furthermore, data on the quantum transport characteristics and relative quantum dot operation behavior of NS devices are also lacking.…”