Crosstalk analysis model for traces crossing split ground plane and its reduction by stitching capacitor

Xiao, Fengchao; Nakada, Yohei; Murano, Kimitoshi; Kami, Yoshio

doi:10.1002/ecjb.20338

Cited by 20 publications

(16 citation statements)

References 8 publications

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“…In reference [2] it was concluded that the coupling between a trace and a perpendicular slot in a ground plane is due to a magnetic field. So, we can represent the coupling phenomenon in terms of a mutual inductance in a circuit model.…”

Section: Equivalent Circuit Modelmentioning

confidence: 99%

Circuit Model for Two Parallel Microstrip Lines on Slotted Ground Plane

Hitoshi

Murano

Xiao

et al. 2007

2007 International Symposium on Electromagnetic Compatibility

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A transmission-characteristic analysis of two parallel microstrip lines on PCB with a slotted ground plane is studied. When two trace lines are very closed, crosstalk occurs between them. In addition to it, magnetic-field coupling between the traces and the slot line also exists. In this paper, a circuit model for transmission characteristics of such line system is proposed. The calculated results are compared with the experimental results to veryfy the proposed model.

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Section: Equivalent Circuit Modelmentioning

confidence: 99%

Circuit Model for Two Parallel Microstrip Lines on Slotted Ground Plane

Hitoshi

Murano

Xiao

et al. 2007

2007 International Symposium on Electromagnetic Compatibility

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“…From the signal integrity point of view, the crosstalk among signal trace crossing a split is non-negligible, even though the space of the trace is large enough. Also the small amount noise added to the power supply may cause system breakdown due to low voltage source is preferred to minimize package system power consumption [10] [11]. AS is well-know, power and the ground plane are the important element of the PDN.…”

Section: B the Signal Propagate Analysismentioning

confidence: 99%

Signal-power integrity co-simulations of high speed systems via chip-package-PCB co-analysis methodology

Wen

Jing

2013

2013 14th International Conference on Electronic Packaging Technology

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Under the platform of a high-speed package system, a modeling method considering all the signi cant effects from the chip, package, and board levels is developed to identify and investigate the critical nets affecting the signal or power integrity(SI/PI). For SI issues, accurate modelings for signal channel are verified by system of high speed line. The following what-if analyses help to identify the package trace's bottlenecks and have great effects on signal transmission. For PI part, the modeling methodologies for power distribution networks of data line are demonstrated and validated with the results of frequency domain simulation. Lastly, with the co-simulations by chippackage-PCB model, the paper was talked about the SI and PI problem using SI-PI co-analysis methodology. The analysis results indicates that the parasitic effects of the high speed package system are the most critical, depicting the importance of improved package design in the next high speed package system.

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“…It is well known that signal lines crossing the split reference plane will cause signal integrity (SI) issues [3]- [5] and is prohibited in most of the layout design rules. However, in some high density and low-cost PCB with only 2 or 4 metal layers, slot-crossing lines are unavoidable.…”

Section: Introductionmentioning

confidence: 99%

A Branched Reflector Technique to Reduce Crosstalk Between Slot-Crossing Signal Lines

Chuang¹,

Chou²,

Chang³

et al. 2012

IEEE Microw. Wireless Compon. Lett.

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A branched reflector technique is proposed to reduce the crosstalk between the signal lines crossing common slotted reference plane. An equivalent circuit model based on lossless transmission lines is applied to characterize the coupling mechanism. The design concept of this approach is well explained and its design method is also provided by utilizing the bounce diagram with multiple discontinuities. According to the experimental results, the reduction of the peak crosstalk is about 51% and it is close to the prediction from the estimated formula. The peak-to-peak crosstalk in our interested region can also be reduced by 68%. The proposed method provides a low-cost and effective solution to suppress the undesirable crosstalk between slot-crossing signal lines.

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Crosstalk analysis model for traces crossing split ground plane and its reduction by stitching capacitor

Cited by 20 publications

References 8 publications

Circuit Model for Two Parallel Microstrip Lines on Slotted Ground Plane

Circuit Model for Two Parallel Microstrip Lines on Slotted Ground Plane

Signal-power integrity co-simulations of high speed systems via chip-package-PCB co-analysis methodology

A Branched Reflector Technique to Reduce Crosstalk Between Slot-Crossing Signal Lines

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