Critical dimension scanning electron microscope local overlay measurement and its application for double patterning of complex shapes

Hotta, Susumu; Sutani, Takumichi; Halle, Scott; Moore, Daniel; Archie, Charles N.; Sugiyama, Akiyuki; Ikeno, Masahiko; Yamaguchi, Atsuko; Torii, Kazuyoshi

doi:10.1117/1.3599867

Cited by 8 publications

(4 citation statements)

References 18 publications

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“…Then the edges overlap with each other and degrade the OL measurement accuracy, especially linearity when overlay error is large. Hotta et al 31 had developed SEM-OL metrology for double patterning of complex 2-D holes as well as dense lines.…”

Section: Dedicated Mark and Algorithm Of Sem-ol Metrologymentioning

confidence: 99%

“…The reasons include the difference of measurement patterns (trench and hole) and illumination condition of i-ArF scanner between M1A and V0A. 31 CPE correction is effective in reducing overlay residual. It is expected to reduce overlay error after the correction when the correction is ideally fed back to the scanner.…”

Section: (C)mentioning

confidence: 99%

“…Hotta et al have evaluated hybrid overlay metrology using optical linear correction (10 terms), which is measured at four corners of chips and SEM-OL high-order correction in the intrafield, which is measured at four chips on double patterning process for dense line patterns. 31 5 Overlay for Actual Device Pattern…”

Section: (C)mentioning

confidence: 99%

“…To solve this issue, Hitachi High-Technologies began developing SEM-OL techniques to measure actual device patterns directly or device-like target at after-etch inspection (AEI). 31,32 For initial optimization of Opt-OL metrology, SEM-OL metrology has been used as a reference. 33 In around 2012, the demand of layer-to-layer overlay measurements between surface patterns in device area at AEI using SEM-OL has increased.…”

Section: Introductionmentioning

confidence: 99%

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Review of scanning electron microscope-based overlay measurement beyond 3-nm node device

Ito

Hasumi

2019

J. Micro/Nanolith. MEMS MOEMS

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Overlay control has been one of the most critical issues for manufacturing of leading edge semiconductor devices. Introduction of the double patterning process requires stringent overlay control. Conventional optical overlay (Opt-OL) metrology has technical challenges with measurement robustness, solving overlay discrepancy between overlay mark and device pattern, and measuring smaller marks laid out in large numbers within the die accurately for high-order correction. In contrast, scanning electron microscope-based overlay (SEM-OL) metrology can directly measure both overlay targets and actual devices or device-like structures on processed wafers with high spatial resolution. It can be used for reference metrology and optimization of Opt-OL measurement conditions. SEM-OL uses small structures, including actual device patterns, which allows insertion of many SEM-OL targets across a die. Precise overlay distribution can be measured using dedicated SEM-OL mark, improving measurement accuracy and repeatability. To extend SEM-OL capability, we have been developing SEM-OL techniques that can measure not only surface patterns by critical dimension SEM but also buried patterns for leading edge device processes. There are two techniques to detect buried patterns. One is to use high-acceleration voltage SEM, which detects backscattering electron emphasizing material contrast. It has been adopted for overlay measurements for memory and logic devices at after-etch inspection or even after-develop inspection. The other is to utilize charging effect, which reflects voltage contrast at the surface depending on the material properties of underneath structure. SEM-OL measurement using transient voltage contrast has been developed and its capability of overlay measurement has been proven. An overlay measurement algorithm using template matching method has been developed and was applied to dynamic random access memory (DRAM) process monitor in manufacturing. In order to extend SEM-OL metrology to beyond 3-nm node logic and cutting-edge DRAM devices (half pitch = 14 nm), we are improving measurement precision of detecting buried patterns and measurement throughput by developing optimized SEM-OL mark.

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Section: Dedicated Mark and Algorithm Of Sem-ol Metrologymentioning

confidence: 99%

Section: (C)mentioning

confidence: 99%

Section: (C)mentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Review of scanning electron microscope-based overlay measurement beyond 3-nm node device

Ito

Hasumi

2019

J. Micro/Nanolith. MEMS MOEMS

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Enhanced process control of pitch split double patterning by use of CD-SEM critical dimension uniformity and local overlay metrics

Halle

Hotta²,

Koay

et al. 2012

2012 SEMI Advanced Semiconductor Manufacturing Conference

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Device-correlated metrology for overlay measurements

Chen

Huang

Pai

et al. 2014

J. Micro/Nanolith. MEMS MOEMS

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Abstract. One of the main issues with accuracy is the bias between the overlay (OVL) target and actual device OVL. In this study, we introduce the concept of device-correlated metrology (DCM), which is a systematic approach to quantify and overcome the bias between target-based OVL results and device OVL values. In order to systematically quantify the bias components between target and device, we introduce a new hybrid target integrating an optical OVL target with a device mimicking critical dimension scanning electron microscope (CD-SEM) target. The hybrid OVL target is designed to accurately represent the process influence on the actual device. In the general case, the CD-SEM can measure the bias between the target and device on the same layer after etch inspection (AEI) for all layers, the OVL between layers at AEI for most cases and after develop inspection for limited cases such as double-patterning layers. The results have shown that for the innovative process compatible hybrid targets the bias between the target and device is small, within the order of CD-SEM noise. Direct OVL measurements by CD-SEM show excellent correlation between CD-SEM and optical OVL measurements at certain conditions. This correlation helps verify the accuracy of the optical measurement results and is applicable for the imaging base OVL method using several target types advance imaging metrology, advance imaging metrology in die OVL, and the scatterometrybase OVL method. Future plans include broadening the hybrid target design to better mimic each layer process conditions such as pattern density. Additionally, for memory devices we are developing hybrid targets which enable other methods of accuracy verification.

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Critical dimension scanning electron microscope local overlay measurement and its application for double patterning of complex shapes

Cited by 8 publications

References 18 publications

Review of scanning electron microscope-based overlay measurement beyond 3-nm node device

Review of scanning electron microscope-based overlay measurement beyond 3-nm node device

Enhanced process control of pitch split double patterning by use of CD-SEM critical dimension uniformity and local overlay metrics

Device-correlated metrology for overlay measurements

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