cReComp: Automated Design Tool for ROS-Compliant FPGA Component

Yamashina, Kazushi; Kimura, Hitomi; Ohkawa, Takenao; Ootsu, Kanemitsu; Yokota, Takashi

doi:10.1109/mcsoc.2016.47

Cited by 26 publications

(17 citation statements)

References 12 publications

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“…Therefore, the development of the ROS-compliant FPGA component may become the bottleneck process of the entire project in robot development. To solve the problem, we are also working on an automated tool for designing the proposed ROS-compliant FPGA components, called cReComp [14]. By using cReComp, experimental results show that only less than one hour is enough for novice designers to implement a ROS-compliant FPGA component into programmable SoC.…”

Section: Discussionmentioning

confidence: 99%

FPGA Components for Integrating FPGAs into Robot Systems

Ohkawa

Yamashina

Kimura

et al. 2018

IEICE Trans. Inf. & Syst.

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SUMMARYA component-oriented FPGA design platform is proposed for robot system integration. FPGAs are known to be a power-efficient hardware platform, but the development cost of FPGA-based systems is currently too high to integrate them into robot systems. To solve this problem, we propose an FPGA component that allows FPGA devices to be easily integrated into robot systems based on the Robot Operating System (ROS). ROS-compliant FPGA components offer a seamless interface between the FPGA hardware and software running on the CPU. Two experiments were conducted using the proposed components. For the first experiment, the results show that the execution time of an FPGA component for image processing was 1.7 times faster than that of the original software-based component and was 2.51 times more power efficient than an ordinary PC processor, despite substantial communication overhead. The second experiment showed that an FPGA component for sensor fusion was able to process multiple sensor inputs efficiently and with very low latency via parallel processing.

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Section: Discussionmentioning

confidence: 99%

FPGA Components for Integrating FPGAs into Robot Systems

Ohkawa

Yamashina

Kimura

et al. 2018

IEICE Trans. Inf. & Syst.

Self Cite

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“…To achieve this objective, a camera is connected to a computer and through ssh connection it communicates with a SoC system which in turn, oversees extracting features from the image. ROS compliant is presented in [22], as a communication protocol between ROS topics and the logic components of the FPGA, aiming to enhance the design productivity, as well as the operation speed. Authors claim an acceleration of 1.85× when compared with the original software-based components.…”

Section: Related Workmentioning

confidence: 99%

Embbedded System-on-Chip 3D Localization and Mapping—eSoC-SLAM

Gerlein

Díaz-Guevara

Carrillo³

et al. 2021

Electronics

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This paper discusses a novel embedded system-on-chip 3D localization and mapping (eSoC-LAM) implementation, that followed a co-design approach with the primary aim of being deployed in a small system on a programmable chip (SoPC), the Intel’s (a.k.a Altera) Cyclone V 5CSEMA5F31C6N, available in the Terasic’s board DE1-SoC. This computer board incorporates an 800 MHz Dual-core ARM Cortex-A9 and a Cyclone V FPGA with 85k programmable logic elements and 4450 Kbits of embedded memory running at 50 MHz. We report experiments of the eSoC-LAM implementation using a Robosense’s 3D LiDAR RS-16 sensor in a Robotis’ TurtleBot2 differential robot, both controlled by a Terasic’s board DE1-SoC. This paper presents a comprehensive description of the designed architecture, design constraints, resource optimization, HPS-FPGA exchange of information, and co-design results. The eSoC-LAM implementation reached an average speed-up of 6.5× when compared with a version of the algorithm running in a the hard processor system of the Cyclone V device, and a performance of nearly 32 fps, while keeping high map accuracy.

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“…The way it was implemented make the image processing 1.7 times faster than the software version. The same research team proposed in [19] cReComp, an automated design tool to improve productivity of ROScompliant FPGA component. Then, authors of [16] proposed an architecture exploration for SLAM processing based on works of the two aforementioned papers.…”

Section: B Hardware In the Loop Simulations For Uavsmentioning

confidence: 99%

Hardware-in-the-loop simulation with dynamic partial FPGA reconfiguration applied to computer vision in ROS-based UAV

Moréac

Abdali

Berry

et al. 2020

2020 International Workshop on Rapid System Prototyping (RSP)

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Hardware in the loop simulation has become a fundamental tool for the safe and rapid development of embedded systems. Dynamically and partially reconfigurable FPGA provide an energy efficient solution for high performance computing in embedded systems, such as computer vision, with limited resources. Finally 3D simulation with realistic physics simulation is required by designers of Unmanned Aerial Vehicle (UAV) and related missions. The combination of the three techniques are required to design UAV with reconfigurable HW/SW embedded systems that can self-adapt to different mission phases according to environment changes. But they require different complex and specific skills from separated communities and so are not considered simultaneously. In this paper we demonstrate a complete framework that we apply to a UAV case simulated with the well adopted Gazebo 3D simulation tool including the Ardupilot model. According to usual practices in Robotics, we use Robot Operating System (ROS) middleware over Linux that we implement on a separated Intel Cyclone V FPGA board including HW/SW interfaces. As a convincing case study we implement, besides software classical navigation tasks, a vision-based emergency-landing security task and a detect and tracking classic mission application (TLD) that can run in different HW and SW versions dynamically configured on the FPGA according to mission steps simulated with Gazebo.

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cReComp: Automated Design Tool for ROS-Compliant FPGA Component

Cited by 26 publications

References 12 publications

FPGA Components for Integrating FPGAs into Robot Systems

FPGA Components for Integrating FPGAs into Robot Systems

Embbedded System-on-Chip 3D Localization and Mapping—eSoC-SLAM

Hardware-in-the-loop simulation with dynamic partial FPGA reconfiguration applied to computer vision in ROS-based UAV

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