DOI: 10.1007/978-3-540-78610-8_27
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Creating the World’s Largest Reconfigurable Supercomputing System Based on the Scalable SGI® Altix® 4700 System Infrastructure and Benchmarking Life-Science Applications

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“…A development environment is provided that supports the use of both high-level (e.g., Handel-C, Mitrion-C) and low-level (e.g., Verilog, VHDL) hardware description languages for generating FPGA configurations. A single system image of the available FPGAs is provided by the RASC Abstraction Layer (RASCAL), a software stack that performs automatic wide scaling across multiple FPGAs [103].…”
Section: Aggregation Of Peripheral Devicesmentioning
confidence: 99%
“…A development environment is provided that supports the use of both high-level (e.g., Handel-C, Mitrion-C) and low-level (e.g., Verilog, VHDL) hardware description languages for generating FPGA configurations. A single system image of the available FPGAs is provided by the RASC Abstraction Layer (RASCAL), a software stack that performs automatic wide scaling across multiple FPGAs [103].…”
Section: Aggregation Of Peripheral Devicesmentioning
confidence: 99%
“…A number of abstraction models have been proposed for co-processors that present a single system image to the application developer or runtime environment. For example, RAS-CAL (Reconfigurable Application-Specific Computing Abstraction Layer) is a software library developed by SGI that provides functionality for device allocation, reconfiguration, data transport, error handling and automatic wide scaling across multiple FPGAs [19]. Virtual OpenCL (VCL) [8] provides a similar API-level abstraction for GPUs distributed across a cluster.…”
Section: Virtualization By Aggregationmentioning
confidence: 99%