COSMOS: a compiled simulator for MOS circuits

Bryant, Randal E.; Beatty, Derek L.; Brace, Karl S.; Cho, K.; Sheffler, Thomas J.

doi:10.1145/37888.37890

Cited by 223 publications

(48 citation statements)

References 7 publications

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“…By definition, the Boolean operators propagate 'X' over their identity element (if any). COSMOS, a prototype application based on STE, simulated a 64-bit ALU [4]. FORTE [5] is a more-advanced tool.…”

Section: A Ste-based Approachesmentioning

confidence: 99%

High-level symbolic simulation for automatic model extraction

Ouchet

Borrione

Morin-Allory

et al. 2009

2009 12th International Symposium on Design and Diagnostics of Electronic Circuits &Amp; Systems

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Section: A Ste-based Approachesmentioning

confidence: 99%

High-level symbolic simulation for automatic model extraction

Ouchet

Borrione

Morin-Allory

et al. 2009

2009 12th International Symposium on Design and Diagnostics of Electronic Circuits &Amp; Systems

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“…Therefore, no sophisticated encoding of 0, 1, Z , U; and X values by several Boolean variables [4] is necessary. The high-impedance state or additional logic values are never considered as alternatives during the decision-making phase.…”

Section: ) Non-boolean Violationmentioning

confidence: 99%

Redundancy removal and test generation for circuits with non-Boolean primitives

Chakradhar¹,

Rotherweiler²,

Agrawal³

1997

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Production VLSI circuits typically consist of primitives like tristate buffers, bidirectional buffers, and bus configurations that assume non-Boolean values like the high-impedance state. We describe a systematic methodology for extending test generation algorithms that work on combinational circuits with only Boolean primitives to full-scan production circuits. Key features of the methodology are illustrated using the energy minimization based test generation algorithm for combinational circuits. The main features of our methodology that make the test generation algorithm practical for large production circuits are: 1) only one Boolean variable is used to represent the value on a signal and all signals assume only Boolean values during the test generation procedure; 2) the function of non-Boolean primitives is separated into Boolean and non-Boolean components with energy functions required only for the Boolean component; and 3) non-Boolean components are implicitly considered in the energy minimization procedure. In this process, no new energy functions other than the normal Boolean gate energy functions are needed. We give a method for identifying and removing redundancies in production circuits using energy minimization. The formulation is also applicable to Boolean satisfiability and BDD methods. We first use the test generation algorithm for identifying undetectable faults and then relax specific constraints in the original test generation problem by ignoring the non-Boolean components. We show that undetectability in the relaxed formulation implies redundancy. We report redundancy removal results for production VLSI circuits, ISCAS 85, and full-scan versions of the ISCAS 89 benchmark circuits.

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“…Over the past many years, many different techniques have been explored, and there is an active and continuing interest in simulation problems today. See [1][2][3][4][5][6][7][8][9][10][11][12][13][14] for a small sampling of this work.…”

Section: Introductionmentioning

confidence: 99%

Using conjugate symmetries to enhance gate-level simulations

Maurer

2006

Proceedings of the Design Automation &Amp; Test in Europe Conference

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State machine based simulation of Boolean functions is substantially faster if the function being simulated is symmetric. Unfortunately function symmetries are comparatively rare. Conjugate symmetries can be used to reduce the state space for functions that have no detectable symmetries, allowing the benefits of symmetry to be applied to a much wider class of functions. Substantial improvements in simulation speed, from 30-40% have been realized using these techniques.

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COSMOS: a compiled simulator for MOS circuits

Cited by 223 publications

References 7 publications

High-level symbolic simulation for automatic model extraction

High-level symbolic simulation for automatic model extraction

Redundancy removal and test generation for circuits with non-Boolean primitives

Using conjugate symmetries to enhance gate-level simulations

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