Coscheduling of CPU and I/O Transactions in COTS-Based Embedded Systems

Pellizzoni, Rodolfo; Bui, B.D.; Caccamo, Marco; Sha, Lui

doi:10.1109/rtss.2008.42

Cited by 66 publications

(39 citation statements)

References 11 publications

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“…The knowledge of the deterministic location of the preemption points can be exploited to simplify the analysis of the cache state at each point, so improving the estimation of the preemption overhead. Specific experiments on CRPD showed that WCET can increase up to 40% in the presence of preemptions, with respect to a fully nonpreemptive execution [26].…”

Section: This Work Has Been Supported In Part By the European Commissmentioning

confidence: 99%

Optimal Selection of Preemption Points to Minimize Preemption Overhead

Bertogna

Xhani

Marinoni

et al. 2011

2011 23rd Euromicro Conference on Real-Time Systems

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Abstract-A central issue for verifying the schedulability of hard realtime systems is the correct evaluation of task execution times. These values are significantly influenced by the preemption overhead, which mainly includes the cache related delays and the context switch times introduced by each preemption. Since such an overhead significantly depends on the particular point in the code where preemption takes place, this paper proposes a method for placing suitable preemption points in each task in order to maximize the chances of finding a schedulable solution.In a previous work, we presented a method for the optimal selection of preemption points under the restrictive assumption of a fixed preemption cost, identical for each preemption point. In this paper, we remove such an assumption, exploring a more realistic and complex scenario where the preemption cost varies throughout the task code. Instead of modeling the problem with an integer programming formulation, with exponential worst-case complexity, we derive an optimal algorithm that has a linear time and space complexity. This somewhat surprising result allows selecting the best preemption points even in complex scenarios with a large number of potential preemption locations. Experimental results are also presented to show the effectiveness of the proposed approach in increasing the system schedulability.

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Section: This Work Has Been Supported In Part By the European Commissmentioning

confidence: 99%

Optimal Selection of Preemption Points to Minimize Preemption Overhead

Bertogna

Xhani

Marinoni

et al. 2011

2011 23rd Euromicro Conference on Real-Time Systems

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“…Supply functions have been used, possibly under different names in different contexts [e.g. service curves in network/real-time calculus (Cruz 1991;Baccelli et al 1992;Thiele et al 2000)], to model the availability of different types of resource: processing time of a single (Mok et al 2001;Lipari and Bini 2003;Shin and Lee 2003) or multi-core (Bini 2009;Xu et al 2015) platform, network (Cruz 1991;Almeida et al 2002), memory (Yun et al 2016;Åkesson and Goossens 2011), and I/O (Pellizzoni et al 2008). However, this is the first instance in which a supply function is constructed based on the experimental execution trace.…”

Section: The Supply Analysis Modulementioning

confidence: 99%

rt-muse: measuring real-time characteristics of execution platforms

2017

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Operating systems code is often developed according to principles like simplicity, low overhead, and low memory footprint. Schedulers are no exceptions. A scheduler is usually developed with flexibility in mind, and this restricts the ability to provide real-time guarantees. Moreover, even when schedulers can provide realtime guarantees, it is unlikely that these guarantees are properly quantified using theoretical analysis that carries on to the implementation. To be able to analyze the guarantees offered by operating systems' schedulers, we developed a publicly available tool that analyzes timing properties extracted from the execution of a set of threads and computes the lower and upper bounds to the supply function offered by the execution platform, together with information about migrations and statistics on execution times. rt-muse evaluates the impact of many application and platform characteristics including the scheduling algorithm, the amount of available resources, the usage of shared resources, and the memory access overhead. Using rt-muse, we show the impact of Linux scheduling classes, shared data and application parallelism, on the delivered computing capacity. The tool provides useful insights on the runtime behavior of the applications and scheduler. In the reported experiments, rt-muse detected some issues arising with the real-time

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“…In contrast to our work, theirs does not address refresh side-effects on predictability. Our work is rather in the spirit of prior work on increasing the predictability of hardware peripherals for real-time software, such as bus-level I/O transaction control [18]. Predator [1] is a predictable SDRAM memory controller using a hardwarebased approach to achieve a guaranteed lower bound on efficiency and an upper bound on the latency in the presence of SDRAM refreshes and multiple users sharing the same SDRAM.…”

Section: Reduction In Dram Energy Consumptionmentioning

confidence: 99%

Making DRAM refresh predictable

Bhat

Mueller

2011

Real-Time Syst

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Abstract-Embedded control systems with hard real-time constraints require that deadlines are met at all times or the system may malfunction with potentially catastrophic consequences. Schedulability theory can assure deadlines for a given task set when periods and worst-case execution times (WCETs) of tasks are known. While periods are generally derived from the problem specification, a task's code needs to be statically analyzed to derive safe and tight bounds on its WCET. Such static timing analysis abstracts from program input and considers loop bounds and architectural features, such as pipelining and caching. However, unpredictability due to dynamic memory (DRAM) refresh cannot be accounted for by such analysis, which limits its applicability to systems with static memory (SRAM).In this paper, we assess the impact of DRAM refresh on task execution times and demonstrate how predictability is adversely affected leading to unsafe hard real-time system design. We subsequently contribute a novel and effective approach to overcome this problem through software-initiated DRAM refresh. We develop (1) a pure software and (2) a hybrid hardware/software refresh scheme. Both schemes provide predictable timings and fully replace the classical hardware autorefresh. We discuss implementation details based on this design for multiple concrete embedded platforms and experimentally assess the benefits of different schemes on these platforms. The resulting predictable execution behavior in the presence of DRAM refresh combined with the additional benefit of reduced access delays is unprecedented, to the best of our knowledge.

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Coscheduling of CPU and I/O Transactions in COTS-Based Embedded Systems

Cited by 66 publications

References 11 publications

Optimal Selection of Preemption Points to Minimize Preemption Overhead

Optimal Selection of Preemption Points to Minimize Preemption Overhead

rt-muse: measuring real-time characteristics of execution platforms

Making DRAM refresh predictable

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