Cortical-inspired placement and routing: minimizing the memory resources in multi-core neuromorphic processors

Abstract

Brain-inspired event-based neuromorphic processing systems have been emerging as a promising technology in particular for bio-medical circuits and systems. However, both neuromorphic and biological implementations of neural networks have critical energy and memory constraints. To minimize the use of memory resources in multi-core neuromorphic processors, we propose a network design approach that takes inspiration from biological neural networks. We use this approach to design a new routing scheme optimized for small-world networks and, at the same time, to present a hardware-aware placement algorithm that optimizes the allocation of resources for small-world network models. We validate the algorithm with a canonical small-world network and present preliminary results for other networks derived from it.

Computing of neuromorphic materials: an emerging approach for bioengineering solutions

“…The term ''latency encoding'' describes the representation of data using the precise timing or temporal pattern of spikes. [188][189][190] The intervals between spikes contain information on the temporal organization of the input or the relative timing of events. The SNN may be made to record temporal relationships and synchronize with time-varying data because neurons can be made to respond to particular temporal patterns.…”