Correlation between surface-state density and impact ionization phenomena in GaAs MESFET's

Paccagnella, A.; Zanoni, Enrico; Tedesco, C.; Lanzieri, C.; Cetronio, A.

doi:10.1109/16.158692

Cited by 23 publications

(8 citation statements)

References 7 publications

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“…Several macroscopic studies have been performed on the SiO / GaAs interface, [20][21][22][23] but none on the atomic level. Building on previous work, the results presented in this manuscript show how the exact atomic placement of SiO adsorbates influences the electronic structure of SiO / GaAs͑001͒-c͑2 ϫ 8͒ / ͑2 ϫ 4͒ system.…”

Section: Introductionmentioning

confidence: 99%

Direct and indirect causes of Fermi level pinning at the SiO∕GaAs interface

Winn

Hale

Grassman

et al. 2007

The Journal of Chemical Physics

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The correlation between atomic bonding sites and the electronic structure of SiO on GaAs(001)-c(2x8)/(2x4) was investigated using scanning tunneling microscopy (STM), scanning tunneling spectroscopy (STS), and density functional theory (DFT). At low coverage, STM images reveal that SiO molecules bond Si end down; this is consistent with Si being undercoordinated and O being fully coordinated in molecular SiO. At approximately 5% ML (monolayer) coverage, multiple bonding geometries were observed. To confirm the site assignments from STM images, DFT calculations were used to estimate the total adsorption energies of the different bonding geometries as a function of SiO coverage. STS measurements indicated that SiO pins the Fermi level midgap at approximately 5% ML coverage. DFT calculations reveal that the direct causes of Fermi level pinning at the SiO GaAs(001)-(2x4) interface are a result of either local charge buildups or the generation of partially filled dangling bonds on Si atoms.

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Section: Introductionmentioning

confidence: 99%

Direct and indirect causes of Fermi level pinning at the SiO∕GaAs interface

Winn

Hale

Grassman

et al. 2007

The Journal of Chemical Physics

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“…This phenomenon is known as the breakdown walkout, and is attributed to the hot-electron effects reported by Menozzi et al [11]. The gate-drain breakdown walkout is believed to be caused by the creation and filling of electron traps between the gate and the drain, leading to widening of the depletion region and reducing the electric field [12,13]. End resistance measurements [14] indicate that the drain-to-channel resistance, R D , will increase by approximately 12% after hot-electron stresses, while on the source side only a slight decrease in R S , 0.2%, is observed.…”

Section: Gate-drain Breakdown Walkoutmentioning

confidence: 96%

“…One is the widening of the depletion region, while the other is the trapping of the carriers under the gate. The widening of the depletion region under the gate reduces the peak of the electric field [12,13] and decreases the image-force barrier height lowering, leading to larger Schottky barriers. One possible explanation is that the reverse leakage current density decreases with larger Schottky barriers.…”

Section: Increase Of I Ds In the Saturation Regionmentioning

confidence: 98%

“…There are several possible explanations for this. First, the depletion region under the gate expands towards the drain after hot-electron stresses, and the widening of the depletion region reduces the maximum electric field [12,13], causing the ionization rate to decrease. Thus, jI G j decreases in the À1.2 V < V G < À0.5 V region after hot-electron stresses.…”

Section: Increase Of I Ds In the Saturation Regionmentioning

confidence: 99%

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Hot-electron effects on AlGaAs/InGaAs/GaAs PHEMTs under accelerated DC stresses

Huang¹,

Wang²,

Houng³

et al. 2006

Microelectronics Reliability

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“…breakdown walkout in PHEMTs [5]. This phenomenon is a creation and filling of electron traps by hot carriers in the gate-drain region [6,7]. The temperature-dependent characteristics of AlGaAs PHEMTs with temperature ranging from 300 K to 420 K with step of 30 K will be studied.…”

Section: Introductionmentioning

confidence: 99%

On the Reliability of Accelerated Testing in AIGaAs/InGaAs/GaAsPHEMTs

Yarn

Chien

Wang

2002

Active and Passive Electronic Components

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The study of different stress on device characteristics of AlGaAs/InGaAs/GaAs PHEMTs has been researched and developed in this report. Many catastrophic degradation mechanisms such as hot-electron, gate-drain breakdown,IDS,IG,VPand gate Schottky barrier effects are discussed in detail. In addition, the accelerated testing of the temperature-dependent effects onID,Gmand Schottky barrier are examined.

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Correlation between surface-state density and impact ionization phenomena in GaAs MESFET's

Cited by 23 publications

References 7 publications

Direct and indirect causes of Fermi level pinning at the SiO∕GaAs interface

Direct and indirect causes of Fermi level pinning at the SiO∕GaAs interface

Hot-electron effects on AlGaAs/InGaAs/GaAs PHEMTs under accelerated DC stresses

On the Reliability of Accelerated Testing in AIGaAs/InGaAs/GaAsPHEMTs

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