Copper Encapsulated Ultra-Thin NbN Films and Damascene Structures on 300 mm Si Wafers

Kar, Soumen; Walker, Harrison; Shah, Archit; Frost, Hunter; Olson, Stephen C.; Mucci, John; Nalaskowski, Jakub; Martinick, Brian; Schujman, Sandra; Murray, Thomas F.; Johnson, Corbet; Wells, Ilyssa; Bourque, Ronald; Pierce, Stanley; Bhatia, Ekta; Hamilton, Michael C.; Rao, Satyavolu S. Papa

doi:10.1109/tasc.2023.3249127

IEEE Trans. Appl. Supercond.

2023

DOI: 10.1109/tasc.2023.3249127

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Copper Encapsulated Ultra-Thin NbN Films and Damascene Structures on 300 mm Si Wafers

Soumen Kar¹,

Harrison Walker

Archit Shah

et al.

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2024

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Cited by 2 publications

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“…In this process, the assumption is that the minimum diameter of the JJs is assumed to be 200 nm, and the minimum feature size for the lines is 100 nm. The line thickness is 100 nm, which is possible in [34].…”

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confidence: 99%

High-density superconductive logic circuits utilizing 0 and π josephson junctions

Razmkhah,

Pedram

2024

Eng. Res. Express

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Superconductor Electronics (SCE) is a fast and power-efficient technology with great potential for overcoming conventional CMOS electronics' scaling limits. Nevertheless, the primary challenge confronting SCE today is its integration level, which lags several orders of magnitude behind CMOS circuits. In this study, we have innovated and simulated a novel logic family grounded in the principles of phase shifts occurring in 0 and π Josephson junctions. The fast phase logic (FPL) eliminates the need for large inductor loops and shunt resistances by combining the half-flux and phase logic. Therefore, the Josephson junction (JJ) area only limits the integration density. The cells designed with this paradigm are fast, and the clock-to-Q delay for logic cells is about 4ps. While maintaining over 50% parameter margins for wiring cells. This logic is power efficient and can increase the integration by at least 100 times in the SCE chips.

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High-density superconductive logic circuits utilizing 0 and π josephson junctions

Razmkhah,

Pedram

2024

Eng. Res. Express

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Transport Properties of NbN-Cu Bilayer Superconducting Nanowires

Shah,

Kar,

Tillman

et al. 2024

IEEE Trans. Appl. Supercond.

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Copper Encapsulated Ultra-Thin NbN Films and Damascene Structures on 300 mm Si Wafers

Cited by 2 publications

References 17 publications

High-density superconductive logic circuits utilizing 0 and π josephson junctions

High-density superconductive logic circuits utilizing 0 and π josephson junctions

Transport Properties of NbN-Cu Bilayer Superconducting Nanowires

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