Cooperative Caching with Keep-Me and Evict-Me

Sartor, Jennifer B.; Venkiteswaran, Subramaniam; McKinley, Kathryn S.; Wang, Z.

doi:10.1109/interact.2005.7

Cited by 26 publications

(15 citation statements)

References 34 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Prior work proposes a cooperative softwarehardware technique to improve cache replacement decisions and prefetching based on program data usage [46,49,50]. Static analysis identifies data that both will and will not be reused again and passes this information to hardware as hints on memory instructions.…”

Section: Related Workmentioning

confidence: 99%

Cooperative cache scrubbing

Sartor

Heirman²,

Blackburn

et al. 2014

Proceedings of the 23rd International Conference on Parallel Architectures and Compilation

View full text Add to dashboard Cite

Managing the limited resources of power and memory bandwidth while improving performance on multicore hardware is challenging. In particular, more cores demand more memory bandwidth, and multi-threaded applications increasingly stress memory systems, leading to more energy consumption. However, we demonstrate that not all memory traffic is necessary. For modern Java programs, 10 to 60% of DRAM writes are useless, because the data on these lines are dead -the program is guaranteed to never read them again. Furthermore, reading memory only to immediately zero initialize it wastes bandwidth. We propose a software/hardware cooperative solution: the memory manager communicates dead and zero lines with cache scrubbing instructions. We show how scrubbing instructions satisfy MESI cache coherence protocol invariants and demonstrate them in a Java Virtual Machine and multicore simulator. Scrubbing reduces average DRAM traffic by 59%, total DRAM energy by 14%, and dynamic DRAM energy by 57% on a range of configurations. Cooperative software/hardware cache scrubbing reduces memory bandwidth and improves energy efficiency, two critical problems in modern systems.

show abstract

Section: Related Workmentioning

confidence: 99%

Cooperative cache scrubbing

Sartor

Heirman²,

Blackburn

et al. 2014

Proceedings of the 23rd International Conference on Parallel Architectures and Compilation

View full text Add to dashboard Cite

show abstract

“…Another kind of dead block prediction involves predicting in software [26,21]. In this approach the compiler collects dead block information and provides hints to the microarchitecture to make cache decisions.…”

Section: Other Dead Block Predictorsmentioning

confidence: 99%

Using dead blocks as a virtual victim cache

Khan

Burger

Jiménez

et al. 2010

Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques

View full text Add to dashboard Cite

show abstract

“…Dead block prediction can be performed in software [23], [28] or in hardware [1], [7], [14], [16]. Software solutions pass hints about dead-block information collected through profiling or compiler analysis [23], [28] to the hardware.…”

Section: Prior Work On Dead Block Predictionmentioning

confidence: 99%

Cache bursts: A new approach for eliminating dead blocks and increasing cache efficiency

Liu

Ferdman

Huh

et al. 2008

2008 41st IEEE/ACM International Symposium on Microarchitecture

163

View full text Add to dashboard Cite

Data caches in general-purpose microprocessors often contain mostly dead blocks and are thus used inefficiently. To improve cache efficiency, dead blocks should be identified and evicted early. Prior schemes predict the death of a block immediately after it is accessed; however, these schemes yield lower prediction accuracy and coverage. Instead, we find that predicting the death of a block when it just moves out of the MRU position gives the best tradeoff between timeliness and prediction accuracy/coverage. Furthermore, the individual reference history of a block in the L1 cache can be irregular because of data/control dependence. This paper proposes a new class of dead-block predictors that predict dead blocks based on bursts of accesses to a cache block. A cache burst begins when a block becomes MRU and ends when it becomes non-MRU. Cache bursts are more predictable than individual references because they hide the irregularity of individual references. When used at the L1 cache, the best burst-based predictor can identify 96% of the dead blocks with a 96% accuracy. With the improved dead-block predictors, we evaluate three ways to increase cache efficiency by eliminating dead blocks early: replacement optimization, bypassing, and prefetching. The most effective approach, prefetching into dead blocks, increases the average L1 efficiency from 8% to 17% and the L2 efficiency from 17% to 27%. This increased cache efficiency translates into higher overall performance: prefetching into dead blocks outperforms the same prefetch scheme without dead-block prediction by 12% at the L1 and by 13% at the L2.

show abstract

Cooperative Caching with Keep-Me and Evict-Me

Cited by 26 publications

References 34 publications

Cooperative cache scrubbing

Cooperative cache scrubbing

Using dead blocks as a virtual victim cache

Cache bursts: A new approach for eliminating dead blocks and increasing cache efficiency

Contact Info

Product

Resources

About