Converting March tests for bit-oriented memories into tests for word-oriented memories

Goor, A.J. van de; Tlili, I.B.S.; Hamdioui, Said

doi:10.1109/mtdt.1998.705945

Cited by 34 publications

(11 citation statements)

References 8 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…We assess the memory BIST, which uses a March-like self-test for a word-based memory organization. The MATS+ [13] is used to perform self-test and has test time of 5 * n/B, where n is number of cells and B is number of bits in a word. Given that memory organization is composed of N user words and N s spare words, the total time to perform memory test is 5 * (N + N s ) operations, which are relatively few.…”

Section: Hardware Overheadmentioning

confidence: 99%

Reliability-Enhanced ECC-Based Memory Architecture Using In-Field Self-Repair

Mayuga

Yamato

Yoneda

et al. 2016

IEICE Trans. Inf. & Syst.

View full text Add to dashboard Cite

SUMMARY Embedded memory is extensively being used in SoCs, and is rapidly growing in size and density. It contributes to SoCs to have greater features, but at the expense of taking up the most area. Due to continuous scaling of nanoscale device technology, large area size memory introduces aging-induced faults and soft errors, which affects reliability. In-field test and repair, as well as ECC, can be used to maintain reliability, and recently, these methods are used together to form a combined approach, wherein uncorrectable words are repaired, while correctable words are left to the ECC. In this paper, we propose a novel in-field repair strategy that repairs uncorrectable words, and possibly correctable words, for an ECC-based memory architecture. It executes an adaptive reconfiguration method that ensures 'fresh' memory words are always used until spare words run out. Experimental results demonstrate that our strategy enhances reliability, and the area overhead contribution is small. key words: memory repair, memory reliability, in-field test and repair, ECC, in-field repair strategy, remapping

show abstract

Section: Hardware Overheadmentioning

confidence: 99%

Reliability-Enhanced ECC-Based Memory Architecture Using In-Field Self-Repair

Mayuga

Yamato

Yoneda

et al. 2016

IEICE Trans. Inf. & Syst.

View full text Add to dashboard Cite

show abstract

“…Multiple subarrays are used instead of one single array to shorten the word and bit lines and thereby reduce the access time. WOMs can be organized internally in many different ways (depending on where the bits of a word are physically located within a row of the memory cell array) [17], [21]: 1) Adjacent: a -bit row in a subarray contains bits. The bits of a word are adjacent.…”

Section: Influence Of the Memory Organizationmentioning

confidence: 99%

“…Traditionally, WOMs have been tested by repeated application of BOM tests, where different data backgrounds (DBs) are used during each iteration [5], [15]- [17], [19]. The disadvantages of this methodology are test time inefficiency and limited fault coverage of coupling faults (CFs) between cells within the same word, which are called intraword CFs.…”

Section: Introductionmentioning

confidence: 99%

“…In addition, it does not guarantee the detection of all intraword CFs. In [17] and [19], DB sequences (DBSs) for intraword idempotent and disturb CFs have been presented. In addition, a systematic way for converting BOM tests into WOM tests has been introduced, based on concatenating the BOM test (which detects faults between words) and the WOM test (which detects the faults within a word).…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

New data-background sequences and their industrial evaluation for word-oriented random-access memories

Hamdioui

Reyes

2005

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Self Cite

View full text Add to dashboard Cite

Abstract-This paper improves upon the state of the art in the testing of intraword coupling faults (CFs) in word-oriented memories. It first presents a complete set of fault models for intraword CFs. Then, it establishes the data background sequence and tests for each intraword CF, as well as a test with complete fault coverage of the targeted faults. All introduced tests will be evaluated industrially, together with the most well-known memory tests. The tests will be applied to big arrays with an interleaved bit-organization as well as to small arrays with an adjacent bit-organization in order to investigate the influence of the memory organization on the intraword CFs. The test results show that the intraword CFs are also significantly important for interleaved memories, even when the cells within a single cell are not physically adjacent. This is due to coupling between the adjacent bit lines and word lines running across the memory array. The paper concludes that intraword CFs should be considered for any serious test purpose or leave substantial defects undetected, especially when considering a high-volume production and a very low defect-per-million (DPM) level.Index Terms-Bit-oriented memories (BOMs), data backgrounds (DBs), fault models (FMs), memory tests, word-oriented memories (WOMs).

show abstract

“…Subsets of this problem have been addressed in [5], [6]. The conversion consists of concatenating to the march test for single-cell faults, and possible interword faults (i.e., faults between words), a march test designed for intraword faults (i.e., faults within words).…”

Section: Introductionmentioning

confidence: 99%

A systematic method for modifying march tests for bit-oriented memories into tests for word-oriented memories

Goor

Tlili

2003

IEEE Trans. Comput.

Self Cite

View full text Add to dashboard Cite

Abstract-Most memory test algorithms are optimized for a particular memory technology and a particular set of fault models, under the assumption that the memory is bit-oriented, i.e., read and write operations affect only a single bit in the memory. Traditionally, word-oriented memories have been tested by repeated application of a test for bit-oriented memories, whereby a different data background is used during each application. This results in time inefficiencies and limited fault coverage. A systematic way of converting tests for bit-oriented memories into tests for word-oriented memories is presented, distinguishing between interword and intraword faults. The conversion consists of concatenating to the test for interword faults, a test for intraword faults. This approach results in more efficient tests with complete coverage of the targeted faults. Word-oriented memory tests are very important, because most memories have an external data path which is wider than one bit.

show abstract

Converting March tests for bit-oriented memories into tests for word-oriented memories

Cited by 34 publications

References 8 publications

Reliability-Enhanced ECC-Based Memory Architecture Using In-Field Self-Repair

Reliability-Enhanced ECC-Based Memory Architecture Using In-Field Self-Repair

New data-background sequences and their industrial evaluation for word-oriented random-access memories

A systematic method for modifying march tests for bit-oriented memories into tests for word-oriented memories

Contact Info

Product

Resources

About