ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation

Abstract

High-Performance Computing (HPC) processors are nowadays integrated Cyber-Physical Systems demanding complex and high-bandwidth closed-loop power and thermal control strategies. To efficiently satisfy real-time multi-input multi-output (MIMO) optimal power requirements, high-end processors integrate an on-die power controller system (PCS). While traditional PCSs are based on a simple microcontroller (MCU)-class core, more scalable and flexible PCS architectures are required to support advanced MIMO control algorithms for managing the ever-increasing number of cores, power states, and process, voltage, and temperature variability. This paper presents ControlPULP, an open-source, HW/SW RISC-V parallel PCS platform consisting of a single-core MCU with fast interrupt handling coupled with a scalable multi-core programmable cluster accelerator and a specialized DMA engine for the parallel acceleration of real-time power management policies. ControlPULP relies on FreeRTOS to schedule a reactive power control firmware (PCF) application layer. We demonstrate ControlPULP in a power management use-case targeting a next-generation 72-core HPC processor.We first show that the multi-core cluster accelerates the PCF, achieving 4.9x speedup compared to single-core execution, enabling more advanced power management algorithms within the control hyper-period at a shallow area overhead, about 0.1\% the area of a modern HPC CPU die. We then assess the PCS and PCF by designing an FPGA-based, closed-loop emulation framework that leverages the heterogeneous SoCs paradigm, achieving DVFS tracking with a mean deviation within 3\% the plant's thermal design power (TDP) against a software-equivalent model-in-the-loop approach. Finally, we show that the proposed PCF compares favorably with an industry-grade control algorithm under computational-intensive workloads.

A High-Performance, Energy-Efficient Modular DMA Engine Architecture

“…ControlPULP [12] is an on-chip parallel microcontroller unit (MCU) employed as a power controller system (PCS) for manycore HPC processors. It comprises a single 32-b RISC-V manager domain with 512 KiB of L2 scratchpad memory and a programmable accelerator (cluster domain) hosting eight 32-b RISC-V cores and 128 KiB of TCDM.…”

“…iDMAE Integration: As presented by Ottaviano et al [12], the manager domain offloads the computation of the control action to the cluster domain, which independently collects the relevant data from PVT sensors and VRMs. We redesign ControlPULP's data movement paradigm by integrating a second dedicated iDMAE, called sensor DMAE (sDMAE), in the manager domain to simplify the programming model and redirect non-computational, high-latency data movement functions to the manager domain, similar to IBM's Pstate and Stop engines [24].…”

“…Benchmarks and results: We evaluate the performance of the enhanced sDMAE by executing the PCF on top of FreeRTOS within an FPGA-based (Xilinx Zynq Ul-traScale+) hardware-in-the-loop (HIL) framework that couples the programmable logic implementing the PCS with a power, thermal, and performance model of the plant running on top of the ARM-based Processing System [12].…”

“…We consider a PFCT running at 500 µs and the PVCT at 50 µs, meaning at least ten task preemptions during one PFCT step with FreeRTOS preemptive scheduling policy. The measured task context switch time in FreeRTOS for ControlPULP is about 120 clock cycles [12], while iDMAE programming overhead for reading and applying the computed voltages is about 100 clock cycles. From FPGA profiling runs we find that the use of sDMAE saves about 2200 execution cycles every scheduling period, thus increasing the slack of the PVCT task.…”

“…We add our iDMAE to a real-time system [12] and implement a dedicated mid-end autonomously launching repeated 3D transfer tasks to reduce core load. Our mid-end incurs an area penalty of 11 kGE, ... negligible compared to the surrounding system.…”