Control of roughness at interfaces and the impact on charge mobility in all-polymer field-effect transistors

Abstract

Using conjugated polymers as the active materials in electronic and optoelectronic devices opens up the possibility of fabricating all-polymer devices using solution processing technologies. The fabrication of good quality field-effect transistors (FETs) is crucial to a number of polymer-based devices, such as active matrix displays and integrated circuits. Central to FET operation is the dielectric/semiconductor interface. Here we look at the interface between a polymer gate dielectric and a conjugated polymer, using neutron reflectivity. By using a mixed solvent (toluene/cyclohexane) to deposit the conjugated polymer directly on top of the polymer dielectric we are able to fabricate bilayer FET architectures with systematically controlled interfacial roughness, and study the impact on transistor performance.The use of conjugated organic materials as the semiconducting component, within electronic devices is an increasingly important technology. Conjugated polymers combine the promise of products with desirable properties such as flexibility, with the processing advantages of solution-based production methods (large areas at low cost). The nature of the interfaces between semiconducting polymers and other materials is of vital importance in the performance of several organic devices. This study focuses on FETs, where the interface between the polymer dielectric and the semiconducting polymer is of crucial importance, as it is adjacent to this interface that current flows within the device.In this work we focus on a bottom gate, top contact architecture, with poly(9,9-dioctylfluorene-altbithiophene) (F8T2) as the semiconducting layer and poly(methylmethacrylate) (PMMA) as the gate dielectric (see figure 1). By dissolving the F8T2 in a miscible mixture of a good solvent (toluene) and a poor solvent (cyclohexane) for PMMA in various volume ratios, and directly spin-coating onto the PMMA layer, it is possible to control the structure of the buried F8T2/PMMA interface. By varying the ratio of the two solvents in this mixture we are able to systematically control interfacial roughness over a broad range and correlate this directly with charge mobility. FETs were also fabricated following the same procedures, but with the addition of a 300nm SiO 2 on top of the silicon substrate. Our goal in this study was to make polymerpolymer bilayers with controlled interfacial roughness. However, only specific combinations of PMMA molecular weight and solvent ratio can produce well-controlled bilayer structures. If the toluene content is too high, or the PMMA molecular weight too low, dissolution of the PMMA film by the solvent used for the deposition of the F8T2 is too rapid, and a complex laterally structured morphology is obtained. For PMMA with molecular weight Mw=313,500 g/mol we are able to produce bilayers for toluene:cyclohexane (T:C) solvent ratios ranging from 4:1 to 1:3, and it is these bilayers that we shall discuss here.

Self-assembly of semiconductor/insulator interfaces in one-step spin-coating: a versatile approach for organic field-effect transistors

“…81,86,111,112 Armed with the optical constants of each material, the spectroscopic data for the sample can be fitted to different structural models to find the best model based on the quality of the fitting. 81,99 In Fig. It detects the variation in scattering length to determine the composition of the target film.…”

Electron mobility enhancement in solution-processed low-voltage In2O3 transistors via channel interface planarization

“…11,12 Yet, the mechanisms used to explain these differences vary greatly, from templated growth, 13 to interfacial trap states, 14 and planarization of the interface. 15 In this work, we present a direct comparison of In 2 O 3 TFTs and dielectric-only capacitors, produced with single and double layers of three different materials namely; AlO x , HfO x and ZrO x . Both the semiconductor and dielectric layers were solution-processed at temperatures ≤ 200 • C via spincasting.…”

“…11,12,15 Each of these three mechanisms 2018) can affect the carrier mobility within the channel of a TFT, and all are dependent on the quality of the interface between the dielectric and semiconductor. Interface trap states are specifically due to the bonding interaction between semiconductor and dielectric.…”

Depletion of PCBM at the Cathode Interface in P3HT/PCBM Thin Films as Quantified via Neutron Reflectivity Measurements

“…[6,7] In this work, we use neutron reflectivity (NR) [8][9][10] to study the depth dependent composition of a thin-film of the electrondonating polymer P3HT (poly(3-hexylthiophene)) and the electron accepting fullerene derivative PCBM ([6,6]-phenyl-C 61 -butyric acid methyl ester) that have been optimized for operation in an OPV. Although the maximum power conversion efficiency of devices based on P3HT/PCBM that we study is limited to between 4.5 to 5%, this system now serves as an excellent model for developing a full understanding of the strategies necessary to improve the efficiency of new and emerging OPV-applicable materials.…”