Contour based on-device overlay metrology assessment using synthetic SEM images

Abstract

The shift of semiconductor industry applications into demanding markets as spatial and automotive led to high quality requirements to guaranty good performances and reliability in harsh environments. As reliability is directly related to a well controlled process, characterizing the local overlay and its variations inside the chip itself becomes a real asset. While most available in-chip overlay metrologies require dedicated target or dedicated tools, we developed a new method that aims to augment the current SEM tool park into measuring the local overlay directly on the product. In a previous proceeding, this on-device and target-free overlay measurement based on CD-SEM contours has been assessed on SRAM patterns and showed promising results. The work presented here pushes forward this assessment using SEM synthetic images generated from the open-source Nebula simulator of electron-matter interaction. From a layout, a 3D geometry of the measured pattern can be generated, with materials and interfaces carefully defined. Then, a GPU-accelerated Monte-Carlo model simulates in tens of seconds the SEM image. This fast generation of images enables the use of synthetic SEM images in a digital twin system : they can be used to characterize and to challenge the overlay metrology, before applying it to real products. Indeed, a known overlay can be programmed in these images. This way the performances of the measurement algorithm can be assessed with a ground truth reference. Firstly, imaging parameters such as pixel size and noise have been varied in a wide range. This demonstrated a good accuracy and precision inside a defined measurement window with a coefficient of correlation above 0.996 and an offset lower than 0.2nm. In a second part, the influence of the pattern measured has been investigated and experimental results on SRAM could be reproduced using synthetic images. The origin of the loss of sensitivity has been identified and improvements in the contour extractions and used template led to a correlation with a slope of 1.03, an offset of 0.1nm and a Root Mean Square Deviation of 1.36 nm. Finally, the developed digital twin already showed behaviors in the measurement that were hidden in the on-wafer experiments, that helped assessing the method and which will be used in the future to define guidelines for template based SEM-OVL measurements.

High-spatial frequency on-device overlay characterization using CD-SEM contours

“…Currently under development, it has been presented and assessed in previous works. 5,6 This paper investigates whether a dense overlay measurement highlights systematic overlay signatures that can be attributed to the layout. Non-zero overlay, local variability and overlay signatures at a chip level are discussed in order to better understand and optimize the process.…”