Continuous Time Level Crossing Sampling ADC for Bio-Potential Recording Systems

Tang, Wei; Osman, Ahmad; Kim, Dong-Soo; Goldstein, Brian D.; Huang, Chenxi; Martini, Berin; Pieribone, Vincent A.; Culurciello, Eugenio

doi:10.1109/tcsi.2012.2220464

Cited by 73 publications

(19 citation statements)

References 41 publications

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“…1. The amplifier designed to record neural-, and in general bio-, signals, is a standard Low-Noise Amplifier (LNA), analogous to the one originally proposed in [17], but extended with an Analog-to-Digital Delta Modulator similar to the one proposed in [18], with event-generating circuits similar to those used in neuromorphic vision sensors [19], and with AER asynchronous communication handshaking circuits for producing the desired AEs. In parallel, the analog output of the LNA is sent to other five main blocks: a band-pass filter with pulse Analog to Digital Converter (ADC) output, an ADC delta modulator, two analog "peak" and "trough" filter circuits [20], [21], and a basic threshold-crossing spike detector circuit, to investigate potential spike-sorting capabilities of the system.…”

Section: Methodsmentioning

confidence: 99%

A Neuromorphic Event-Based Neural Recording System for Smart Brain-Machine-Interfaces

Corradi

Indiveri

2015

IEEE Trans. Biomed. Circuits Syst.

108

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Abstract-Neural recording systems are a central component of Brain-Machince Interfaces (BMIs). In most of these systems the emphasis is on faithful reproduction and transmission of the recorded signal to remote systems for further processing or data analysis. Here we follow an alternative approach: we propose a neural recording system that can be directly interfaced locally to neuromorphic spiking neural processing circuits for compressing the large amounts of data recorded, carrying out signal processing and neural computation to extract relevant information, and transmitting only the low-bandwidth outcome of the processing to remote computing or actuating modules. The fabricated system includes a low-noise amplifier, a deltamodulator analog-to-digital converter, and a low-power bandpass filter. The bio-amplifier has a programmable gain of 45-54 dB, with a Root Mean Squared (RMS) input-referred noise level of 2.1 µV, and consumes 90 µW. The band-pass filter and delta-modulator circuits include asynchronous handshaking interface logic compatible with event-based communication protocols. We describe the properties of the neural recording circuits, validating them with experimental measurements, and present system-level application examples, by interfacing these circuits to a reconfigurable neuromorphic processor comprising an array of spiking neurons with plastic and dynamic synapses. The pool of neurons within the neuromorphic processor was configured to implement a recurrent neural network, and to process the events generated by the neural recording system in order to carry out pattern recognition.

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Section: Methodsmentioning

confidence: 99%

A Neuromorphic Event-Based Neural Recording System for Smart Brain-Machine-Interfaces

Corradi

Indiveri

2015

IEEE Trans. Biomed. Circuits Syst.

108

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“…The system achieves better performance than another LC sampling based readout system [13]. The LC sampling system is not yet comparable to standard approaches ( [16], [17], [27], [28]) in terms of power.…”

Section: Measurementsmentioning

confidence: 95%

An ECG Recording Front-End With Continuous-Time Level-Crossing Sampling

Mansano

Yuan³

et al. 2014

IEEE Trans. Biomed. Circuits Syst.

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An ECG recording front-end with a continuous- time asynchronous level-crossing analog-to-digital converter (LC-ADC) is proposed. The system is a voltage and current mixed-mode system, which comprises a low noise amplifier (LNA), a programmable voltage-to-current converter (PVCC) as a programmable gain amplifier (PGA) and an LC-ADC with calibration DACs and an RC oscillator. The LNA shows an input referred noise of 3.77 μVrms over 0.06 Hz-950 Hz bandwidth. The total harmonic distortion (THD) of the LNA is 0.15% for a 10 mVPP input. The ECG front-end consumes 8.49 μW from a 1 V supply and achieves an ENOB up to 8 bits. The core area of the proposed front-end is 690 ×710 μm2, fabricated in a 0.18 μm CMOS technology.

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“…To practically embed cognition in the WUC, we propose 1) a flexible and programmable classifier model which can be used to real-time discriminate the patterns of interest, 2) an efficient hardware implementation enabling ULP always-on operating modes, and 3) an ad hoc automatic datadriven training method. The proposed mixed-signal architec- ture consists of a LC-ADC [12], [13], for energy-proportional signal preprocessing and feature extraction, followed by an asynchronous trainable digital pattern recognition circuit to achieve energy efficiency and activity-power proportionality.…”

Section: B Contributionsmentioning

confidence: 99%

A 2.2-<inline-formula> <tex-math notation="LaTeX">$\mu$ </tex-math> </inline-formula>W Cognitive Always-On Wake-Up Circuit for Event-Driven Duty-Cycling of IoT Sensor Nodes

Rovere

Fateh²,

Benini

2018

IEEE J. Emerg. Sel. Topics Circuits Syst.

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We report an always-on event-driven asynchronous wake-up circuit with trainable pattern recognition capabilities to duty-cycle power-constrained internet-of-things (IoT) sensor nodes. The wake-up circuit is based on a level-crossing analogto-digital converter (LC-ADC) employed as feature-extraction block with automatic activity-sampling rate scaling behavior. A novel asynchronous digital logic classifier for sequential pattern recognition is presented. It is driven by the LC-ADC activity and trained to minimize classification errors due to falsely detected events. As proof-of-concept, a prototype of the wake-up circuit is fabricated in 130 nm CMOS technology within 0.054 mm 2 of active area, covering up to 2.6 kHz of input signal bandwidth. The prototype has been first validated by interfacing it with a commercial accelerometer to classify hand gestures in real-time, reaching 81% of accuracy with only 2.2 μW at 1 V supply. To highlight the flexibility of the design, a second application, detecting pathologic ECG beats is also discussed.

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Continuous Time Level Crossing Sampling ADC for Bio-Potential Recording Systems

Cited by 73 publications

References 41 publications

A Neuromorphic Event-Based Neural Recording System for Smart Brain-Machine-Interfaces

A Neuromorphic Event-Based Neural Recording System for Smart Brain-Machine-Interfaces

An ECG Recording Front-End With Continuous-Time Level-Crossing Sampling

A 2.2-<inline-formula> <tex-math notation="LaTeX">$\mu$ </tex-math> </inline-formula>W Cognitive Always-On Wake-Up Circuit for Event-Driven Duty-Cycling of IoT Sensor Nodes

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