Continuous-Time/Discrete-Time &amp;#40;CT/DT&amp;#41; Cascaded Sigma-Delta Modulator for High Resolution and Wideband Applications

Mesgarani, Ali; Sadeghi, Khosrow Haj; Ay, Suat U.

doi:10.1109/wmed.2010.5453773

Cited by 2 publications

(2 citation statements)

References 3 publications

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“…However, since VIC cannot achieve dynamic compensation and the transfer function varies with different operating points, it is not suitable for use in the case. From the time domain perspective, DSM can be classified into two architectures: discrete-time (DT) and continuous-time (CT) [18]. Due to the internal delay integrator, the former has the problem of delay and phase delay, which are undesirable in feedback control systems.…”

Section: Figure 3 Architecture Of a Fhss Buck Convertermentioning

confidence: 99%

A New Low-Noise I-Squared Buck Converter Suitable for Wireless Sensor Networks With Dual-Current-Acceleration Techniques

et al. 2023

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This paper proposed a new low-noise I-squard 2 nd -order continuous-time-delta-sigmamodulation (CT-DSM) buck converter suitable for wireless sensor networks with dual-current-acceleration (DCA) techniques. First, it adopts the second-order CT-DSM scheme, which can effectively utilize the oversampling and the noise shaping techniques to disperse the noise and push it to higher frequencies. Second, the use of the pseudo-inductor-current-sensor can increase the bandwidth of the closed-loop gain and consequently speeds up the transient response of the converter. Third, the dynamic-current regulator utilizes the principle of current charging and discharging to make the converter respond faster when the load changes dynamically. Fourth, this paper combines the pseudo-inductor-current-sensor and the dynamic-current regulator to realize the dual-current-acceleration technique, which can accelerate the transient response by up to 45.5%. The proposed converter is designed and fabricated in TSMC 0.18µm 1P6M CMOS process, and the chip area is 1.065 mm 2 . When the load current changes from 50mA to 500mA and 500mA to 50mA, the transient responses are 2.4s and 3s, respectively, and the peak efficiency is 92.4%. The measurement result of ONR is 78.087dB, with the sampling frequency of 10 MHz.

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Section: Figure 3 Architecture Of a Fhss Buck Convertermentioning

confidence: 99%

A New Low-Noise I-Squared Buck Converter Suitable for Wireless Sensor Networks With Dual-Current-Acceleration Techniques

et al. 2023

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“…This technique conveniently provides high signal-to-quantization noise ratio (SQNR), which makes it important to use in super audio CD format. It is widely used in recent data acquisition systems, Microelectromechanical systems (MEMS), inertial sensors, image sensors, wireless technologies such as long-term evolution advanced (LTE-Advanced), global system for mobile Telecommunication (GSM) and code-division multiple-access (CDMA) etc., where high speed ADCs with wide bandwidth, low noise and less glitch-induced harmonic distortion are required [1][2][3][4][5][6][7][8][9]. Portable audio playback devices, which perform digital-to-analog conversion also make use of it.…”

Section: Introductionmentioning

confidence: 99%

A New Noise Shaping Approach for Sigma-Delta Modulators Using Two-Stage Feed-Forward Delays and Hybrid MASH-EFM

et al. 2023

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Sigma-delta modulators use a noise-shaping technique to curtail the noise power in the band of interest during digital-to-analog conversion. Error feedback modulator employs an efficient noise transfer function for time varying inputs than any other sigma-delta modulators. However, the efficiency of the conventional noise transfer function degrades and the quantizer saturation issue provokes when the input signal reaches to full scale. This work proposes a new noise transfer function which is a combination of transfer functions of two-stage Feed-forward delays and a novel Hybrid multi-stage noise shaping-error feedback sigma-delta modulator. The noise transfer function of two-stage Feed-forward delays mitigates the concern of quantizer saturation. The noise transfer function offered by the Hybrid multi-stage noise shaping-error feedback architecture provides sustainable solutions to limit cycles and idle tones. The simulation concludes that the proposed noise-shaping approach obtains comparatively high signal-to-quantization noise ratio than the conventional error feedback modulators. Other performance parameters like spurious-free dynamic range, effective number of bits and signal-to-noise plus distortion ratio are also significantly improved.

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Continuous-Time/Discrete-Time (CT/DT) Cascaded Sigma-Delta Modulator for High Resolution and Wideband Applications

Cited by 2 publications

References 3 publications

A New Low-Noise I-Squared Buck Converter Suitable for Wireless Sensor Networks With Dual-Current-Acceleration Techniques

A New Low-Noise I-Squared Buck Converter Suitable for Wireless Sensor Networks With Dual-Current-Acceleration Techniques

A New Noise Shaping Approach for Sigma-Delta Modulators Using Two-Stage Feed-Forward Delays and Hybrid MASH-EFM

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