Constraint extraction for pseudo-functional scan-based delay testing

Lin, Yung‐Chieh; Li, Feng; Yang, Kai; Cheng, Kwang-Ting

doi:10.1145/1120725.1120797

Cited by 54 publications

(33 citation statements)

References 23 publications

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“…Functional broadside tests [4] ensure that the scan-in state is a state that the circuit can enter during functional operation, or a reachable state. As broadside tests [5], they operate the circuit in functional mode for two clock cycles after an initial state is scanned in.…”

Section: Iintroductionmentioning

confidence: 99%

“…Test generation procedures for functional and pseudo-functional scan-based tests were described in [4] and [6]- [13]. The on-chip test generation process described in this work guarantees that only reachable states will be used.…”

Section: Iintroductionmentioning

confidence: 99%

“…This alleviates the need to compute reachable states or functional constraints by an offline process as in [4], [6]- [13] and [16]. The underlying observation is related to one of the methods used in [4] for offline test generation, and is the following.…”

Section: Iintroductionmentioning

confidence: 99%

“…The underlying observation is related to one of the methods used in [4] for offline test generation, and is the following.…”

Section: Iintroductionmentioning

confidence: 99%

“…In addition, current demands that are higher than those possible during functional operation may cause voltage drops that will slow the circuit and cause it to fail [2], [3]. In both cases, the circuit will operate correctly during functional operation.Functional broadside tests [4] ensure that the scan-in state is a state that the circuit can enter during functional operation, or a reachable state. As broadside tests [5], they operate the circuit in functional mode for two clock cycles after an initial state is scanned in.…”

mentioning

confidence: 99%

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Test the S27 Benchmark Circuit by Using Built In Self Test and Test Pattern Generation

Nagaraju¹,

Sujatha²,

Ramaraju³

2014

IJAREEIE

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-In the proposed method we are test the S27 sequential circuit by using Built in Self Test.This paper describes an on-chip test generation method for functional broadside tests. The hardware was base on the application of primary input sequences initial from a well-known reachable state, therefore using the circuit to produce additional reachable states. Random primary enter sequences were changed to avoid repeated synchronization and thus defer varied sets of reachable states. Functional broadside tests are two-pattern scan based tests that avoid over testing by ensuring that a circuit traverses only reachable states in the functional clock cycles of a check. These consist of the input vectors and the equivalent responses. They check for proper operation of a verified design by testing the internal chip nodes. Useful tests cover a very high percentage of modeled faults in logic circuits and their generation is the main topic of this method. Often, functional vectors are understood as verification vectors, these are used to verify whether the hardware actually matches its specification. Though, in the ATE world, any one vectors applied are understood to be functional fault coverage vectors applied during developing test. This paper show the on chip test Generation for a bench mark circuit using simple fixed hardware design with small no of parameters altered in the design for the generation of no of patterns. If the patterns of the input test vector results a fault simulation then circuit test is going to fail. I.INTRODUCTIONOver testing due to the application of two-patterns can-based tests was described in [1]- [3]. Over testing is related to the detection of delay faults under non-functional operation situation. One of the reasons for these non-functional operation conditions is the following. When an arbitrary state is used as a scan-in state, a two-pattern test can take the circuit through state-transitions that cannot occur during functional operation. As a result, slow paths that cannot be sensitized during functional operation may cause the circuit to fail [1]. In addition, current demands that are higher than those possible during functional operation may cause voltage drops that will slow the circuit and cause it to fail [2], [3]. In both cases, the circuit will operate correctly during functional operation.Functional broadside tests [4] ensure that the scan-in state is a state that the circuit can enter during functional operation, or a reachable state. As broadside tests [5], they operate the circuit in functional mode for two clock cycles after an initial state is scanned in. This results in the application of a two-pattern test.Since the scan-in state is a reachable state, the two-pattern test takes the circuit through state-transitions that are guaranteed to be possible during functional operation. Delay faults that are detected by the test can also affect functional operation, and the current demands do not exceed those possible during functional operation. This alleviates the type of o...

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Section: Iintroductionmentioning

confidence: 99%