Constant-Depth and Subcubic-Size Threshold Circuits for Matrix Multiplication

Parekh, Ojas; Phillips, Cynthia A.; James, Conrad D.; Aimone, James B.

doi:10.1145/3210377.3210410

Cited by 19 publications

(6 citation statements)

References 18 publications

(23 reference statements)

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“…It is well-known that the extraction of bits from a weighted sum, as well as multiplication of binary numbers, can be carried out by threshold circuits -hence also by SNNs-with a small number of layers -typically 2 or 3-that does not depend on the bit length of the binary numbers involved, however at the cost of increasing the number of neurons to a low-degree polynomial of this bit length. A recent summary of such results is provided in section 3 of (Parekh et al, 2018). Hence one can replace the basic architectures of the AMOS units from Fig.…”

Section: Trade-off Between Latency and Network Size Of The Snnsmentioning

confidence: 99%

Recognizing Images with at most one Spike per Neuron

Stöckl¹,

Maass²

2020

Preprint

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In order to port the performance of trained artificial neural networks (ANNs) to spiking neural networks (SNNs), which can be implemented in neuromorphic hardware with a drastically reduced energy consumption, an efficient ANN to SNN conversion is needed. Previous conversion schemes focused on the representation of the analog output of a rectified linear (ReLU) gate in the ANN by the firing rate of a spiking neuron. But this is not possible for other commonly used ANN gates, and it reduces the throughput even for ReLU gates. We introduce a new conversion method where a gate in the ANN, which can basically be of any type, is emulated by a small circuit of spiking neurons, with At Most One Spike (AMOS) per neuron. We show that this AMOS conversion improves the accuracy of SNNs for ImageNet from 74.60% to 80.97%, thereby bringing it within reach of the best available ANN accuracy (85.0%). The Top5 accuracy of SNNs is raised to 95.82%, getting even closer to the best Top5 performance of 97.2% for ANNs. In addition, AMOS conversion improves latency and throughput of spike-based image classification by several orders of magnitude. Hence these results suggest that SNNs provide a viable direction for developing highly energy efficient hardware for AI that combines high performance with versatility of applications.

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Section: Trade-off Between Latency and Network Size Of The Snnsmentioning

confidence: 99%

Recognizing Images with at most one Spike per Neuron

Stöckl¹,

Maass²

2020

Preprint

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“…Such properties position Fugu to help explore under what parameterization or scale a neural approach may offer an advantage. For example, prior work has analyzed neural algorithms for computational kernels like sorting, optimization, and graph analytics identifying different regions in which a neural advantage exists accounting for neural circuit setup, timing, or other factors [10], [11], [12], [13].…”

Section: Fugumentioning

confidence: 99%

Spiking Neural Streaming Binary Arithmetic

Aimone¹,

Hill²,

Severa³

et al. 2022

Preprint

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Boolean functions and binary arithmetic operations are central to standard computing paradigms. Accordingly, many advances in computing have focused upon how to make these operations more efficient as well as exploring what they can compute. To best leverage the advantages of novel computing paradigms it is important to consider what unique computing approaches they offer. However, for any special-purpose coprocessor, Boolean functions and binary arithmetic operations are useful for, among other things, avoiding unnecessary I/O on-and-off the co-processor by pre-and post-processing data on-device. This is especially true for spiking neuromorphic architectures where these basic operations are not fundamental low-level operations. Instead, these functions require specific implementation. Here we discuss the implications of an advantageous streaming binary encoding method as well as a handful of circuits designed to exactly compute elementary Boolean and binary operations.• One neuron is required per variable represented, with k timesteps required for a k-bit number.

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“…An alternative version of this algorithm streams the inputs in over time and uses delays to make the same computation with fewer neurons, albeit at an extended time cost, a characteristic that will produce di erent neural circuit and associated metadata. It is also important to note that this metadata may be a function of input parameters as wellfor instance in the matrix-multiplication application described in [7], there is a version of the algorithm whose depth is O(log log N ), where N is the size of the largest matrix dimension.…”

Section: 21mentioning

confidence: 99%

Composing neural algorithms with Fugu

Aimone

Severa

Vineyard

2019

Proceedings of the International Conference on Neuromorphic Systems

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Neuromorphic hardware architectures represent a growing family of potential post-Moore's Law Era platforms. Largely due to event-driving processing inspired by the human brain, these computer platforms can o er signi cant energy bene ts compared to traditional von Neumann processors. Unfortunately there still remains considerable di culty in successfully programming, conguring and deploying neuromorphic systems. We present the Fugu framework as an answer to this need. Rather than necessitating a developer a ain intricate knowledge of how to program and exploit spiking neural dynamics to utilize the potential bene ts of neuromorphic computing, Fugu is designed to provide a higher level abstraction as a hardware-independent mechanism for linking a variety of scalable spiking neural algorithms from a variety of sources. Individual kernels linked together provide sophisticated processing through compositionality. Fugu is intended to be suitable for a wide-range of neuromorphic applications, including machine learning, scienti c computing, and more brain-inspired neural algorithms. Ultimately, we hope the community adopts this and other open standardization a empts allowing for free exchange and easy implementations of the ever-growing list of spiking neural algorithms.

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Constant-Depth and Subcubic-Size Threshold Circuits for Matrix Multiplication

Cited by 19 publications

References 18 publications

Recognizing Images with at most one Spike per Neuron

Recognizing Images with at most one Spike per Neuron

Spiking Neural Streaming Binary Arithmetic

Composing neural algorithms with Fugu

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