Conformal Al2O3 dielectric layer deposited by atomic layer deposition for graphene-based nanoelectronics

Lee, Bongki; Park, Seong-Yong; Kim, Hyun-Chul; Cho, Kyeong-Jae; Vogel, Eric M.; Kim, Moon J.; Wallace, Robert M.; Kim, Jiyoung

doi:10.1063/1.2928228

Cited by 260 publications

(251 citation statements)

References 24 publications

Supporting

Mentioning

238

Contrasting

Order By: Relevance

“…However, it has been rather challenging to deposit oxide dielectrics onto graphene without introducing defects. The deposition of high-κ dielectrics is usually achieved using atomic layer deposition (ALD), which requires reactive surface groups (16)(17)(18)(19)(20). Functionalization of graphene surface for ALD either introduces undesired impurities or breaks the chemical bonds in the graphene lattice, inevitably leading to a significant degradation in carrier mobilities (20).…”

mentioning

confidence: 99%

High- κ oxide nanoribbons as gate dielectrics for high mobility top-gated graphene transistors

Liao¹,

Bai

Qu³

et al. 2010

Proc. Natl. Acad. Sci. U.S.A.

192

158

View full text Add to dashboard Cite

Deposition of high-κ dielectrics onto graphene is of significant challenge due to the difficulties of nucleating high quality oxide on pristine graphene without introducing defects into the monolayer of carbon lattice. Previous efforts to deposit high-κ dielectrics on graphene often resulted in significant degradation in carrier mobility. Here we report an entirely new strategy to integrate high quality high-κ dielectrics with graphene by first synthesizing freestanding high-κ oxide nanoribbons at high temperature and then transferring them onto graphene at room temperature. We show that single crystalline Al 2 O 3 nanoribbons can be synthesized with excellent dielectric properties. Using such nanoribbons as the gate dielectrics, we have demonstrated top-gated graphene transistors with the highest carrier mobility (up to 23,600 cm 2 ∕V · s) reported to date, and a more than 10-fold increase in transconductance compared to the back-gated devices. This method opens a new avenue to integrate high-κ dielectrics on graphene with the preservation of the pristine nature of graphene and high carrier mobility, representing an important step forward to high-performance graphene electronics.graphene dielectric integration | carrier mobility | dielectric nanoribbon | nanoelectronics G raphene has attracted considerable interest as a potential electronic material due to its exceptionally high carrier mobility and tunable band gap (1-6). Various strategies have been explored to fabricate field-effect transistors based on graphene or graphene nanostructures (6-13). Most of these efforts to date employ a silicon substrate as a global back gate and silicon oxide as the gate dielectric, which have led to many interesting scientific discoveries, but will be of limited use for practical applications due to the high-gate switching voltage required and the inability to independently address individual devices on the same chip. Top-gated devices with high-κ dielectrics can significantly reduce the required switching voltage and readily allow independently addressable device arrays and functional circuits, and therefore are of significant interest (14, 15).The gate dielectric is an essential component of a transistor, which can significantly impact the critical device parameters including transconductance, subthreshold swing and frequency response. Exploring graphene for future electronics requires effective integration of high quality gate dielectrics, in particular the high-κ dielectrics. However, it has been rather challenging to deposit oxide dielectrics onto graphene without introducing defects. The deposition of high-κ dielectrics is usually achieved using atomic layer deposition (ALD), which requires reactive surface groups (16)(17)(18)(19)(20). Functionalization of graphene surface for ALD either introduces undesired impurities or breaks the chemical bonds in the graphene lattice, inevitably leading to a significant degradation in carrier mobilities (20). Physical vapor deposition (PVD) such as electron-beam evaporation or sput...

show abstract

mentioning

confidence: 99%

High- κ oxide nanoribbons as gate dielectrics for high mobility top-gated graphene transistors

Liao¹,

Bai

Qu³

et al. 2010

Proc. Natl. Acad. Sci. U.S.A.

192

158

View full text Add to dashboard Cite

show abstract

“…However, the fabrication of graphene devices with an atomically uniform gate dielectric, so as to provide a uniform electric field over the active graphene area without damaging the graphene surface remains a challenge. 9 For this reason and the ease with which graphene can be observed, most reported graphene devices are fabricated on Si/SiO 2 which forms a global back gate. Attempts to deposit dielectrics on the surface of graphene to form top gates have been made, however the deposition processes employed tend to damage the graphene, see e. g. Ref.…”

mentioning

confidence: 99%

The catalytic potential of high-κ dielectrics for graphene formation

Scott

Dianat

Börrnert

et al. 2011

Applied Physics Letters

View full text Add to dashboard Cite

The growth of single and multilayer graphene nano-flakes on MgO and ZrO 2 at low temperatures is shown through transmission electron microscopy. The graphene nano-flakes are ubiquitously anchored at step edges on MgO (100) surfaces. Density functional theory investigations on MgO (100) indicate C 2 H 2 decomposition and carbon adsorption at step-edges. Hence, both the experimental and theoretical data highlight the importance of step sites for graphene growth on MgO.PACS numbers: 81.05.ue, 81.16.Hc Graphene promises a great leap forward in electronic device speed due to its high charge carrier mobility. 1 Restricting its dimensions sufficiently (< 10 nm for room temperature applications) to introduce finite size effects can open an energy gap. 2,3 Confining the width and keeping the length infinitely long forms a graphene nano-ribbon (GNR) whilst restricting both the width and length forms a graphene nano-flake. Interesting electronic properties can also arise from bi-layer nanoribbons/flakes and even higher order stacked flakes. Their energy gaps are not just dependent on size, but also on the edge states and electric fields. [4][5][6][7][8] Hence, the richness of electronic properties afforded by graphene causes great excitement for its use in nano-electronic devices. However, various technical hurdles exist. For example, the implementation of graphene in nano-electronic technology is hindered by difficulties in obtaining defect free and clean graphene on suitable substrates. The substrates need to be insulating, ideally have a high dielectric constant, κ, to prevent gate current leakage and hence allow greater miniaturization. In graphene, the carrier concentration and polarity can be modulated by an electric field. However, the fabrication of graphene devices with an atomically uniform gate dielectric, so as to provide a uniform electric field over the active graphene area without damaging the graphene surface remains a challenge. 9 For this reason and the ease with which graphene can be observed, most reported graphene devices are fabricated on Si/SiO 2 which forms a global back gate. Attempts to deposit dielectrics on the surface of graphene to form top gates have been made, however the deposition processes employed tend to damage the graphene, see e. g. Ref. 10. The situation for graphene based devices is further complicated due to restrictions imposed by most of the available synthesis routes. Aside from mechanical cleaving, graphene synthesis generally involves the use of metal catalysts 11-13 which then necessitates postsynthesis transfer of the graphene or in the case of epitaxia) Electronic mail: f.boerrnert@ifw-dresden.de b) Electronic mail: m.ruemmeli@ifw-dresden.de ally grown graphene in SiC high temperatures are required. 14 Other synthesis routes like chemical exfoliation or the necessary transfer steps from the aforementioned routes to dielectric substrates introduce high levels of contamination and defects into the graphene making such synthesis routes incompatible with current planar fabricat...

show abstract

“…Non-covalent functionalization layer (NCFL) can be formed prior to ALD growth via molecules like DNA [62], 3,4,9,10-perylene tetracarboxylic acid (PTCA) [63], and NO 2 shown in Figure 4(b) [64][65][66][67]. Besides molecules, polymer can also play the role of NCFL, such as NFC polymers [54,68,69], and ozone pre-treatment (Figure 4(c)) is proved to work for ALD growth as well [70]. Moreover, directly constructing nucleation layer via oxidation of thin film of evaporated or sputtered Al (several nm), followed by Al 2 O 3 ALD growth, is also a choice to form dielectric on graphene surface [71,72].…”

Section: High-κ Dielectric Growth On Graphenementioning

confidence: 99%

Graphene-based ambipolar electronics for radio frequency applications

2012

View full text Add to dashboard Cite

Graphene is considered as a promising material to construct field-effect transistors (FETs) for high frequency electronic applications due to its unique structure and properties, mainly including extremely high carrier mobility and saturation velocity, the ultimate thinnest body and stability. Through continuously scaling down the gate length and optimizing the structure, the cut-off frequency of graphene FET (GFET) was rapidly increased and up to about 300 GHz, and further improvements are also expected. Because of the lack of an intrinsic band gap, the GFETs present typical ambipolar transfer characteristic without off state, which means GFETs are suitable for analog electronics rather than digital applications. Taking advantage of the ambipolar characteristic, GFET is demonstrated as an excellent building block for ambipolar electronic circuits, and has been used in applications such as highperformance frequency doublers, radio frequency mixers, digital modulators, and phase detectors. Owing to the success isolation of single layer graphene by Novoselov et al. [4] in 2004, the obsolete point was broken down and a tremendous research field has been expanded based on the 2D material [5][6][7][8][9][10][11], and even the 2010 Nobel Prize in Physics was awarded jointly to A. K. Geim and K. S. Novoselov "for groundbreaking experiments regarding the two-dimensional material graphene" [12,13]. The special 2D structure of graphene provides a series of unique properties in mechanics, thermology, optics, and electronics [10,11,[14][15][16][17][18][19]. Graphene not only provides an experimental platform for basic physics, such as relativistic quantum mechanics (or quantum electrodynamics), which is due to the *Corresponding authors (email: zyzhang@pku.edu.cn; lmpeng@pku.edu.cn) massless property of the Dirac fermion behaved electrons in graphene [20][21][22], but also manifests promising application potential in numerous application fields, such as analog radio frequency (RF) field-effect transistors (FETs) [10,[23][24][25], flexible transparent electrodes and touch screen [26], photodetection [11,27,28], and spin transport [29,30]. In this review article, we will focus on the graphene based electronics and applications, especially RF performance of graphene and ambipolar electronics.

show abstract

Conformal Al2O3 dielectric layer deposited by atomic layer deposition for graphene-based nanoelectronics

Cited by 260 publications

References 24 publications

High- κ oxide nanoribbons as gate dielectrics for high mobility top-gated graphene transistors

High- κ oxide nanoribbons as gate dielectrics for high mobility top-gated graphene transistors

The catalytic potential of high-κ dielectrics for graphene formation

Graphene-based ambipolar electronics for radio frequency applications

Contact Info

Product

Resources

About