Conflict Detection in Hardware Transactional Memory

Quislant, Ricardo; Gutiérrez, Eladio; Zapata, Emilio L.; Plata, Óscar

doi:10.1007/978-3-319-14720-8_6

Cited by 2 publications

(2 citation statements)

References 31 publications

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“…In order to prevent wasting time on migration, it is possible to make such a "big" core the transactions of which have priority over the transactions on "small" cores, so that the conflict is resolved by canceling transactions on the "small" core. Generally, it is expected that a solution with complex conflict resolution would be significantly more difficult to verify [52], but in this case it should only delay the response to those messages that would eventually cause transactions cancelation. All these elements of the solution should be examined in detail in the future since they could contribute to significant improvements of the proposed solution.…”

Section: Discussionmentioning

confidence: 99%

Migration in Hardware Transactional Memory on Asymmetric Multiprocessor

Sustran

Protić

2021

IEEE Access

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Section: Discussionmentioning

confidence: 99%

Migration in Hardware Transactional Memory on Asymmetric Multiprocessor

Sustran

Protić

2021

IEEE Access

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“…Conflict detection. Transactions in ReduxSTM perform validation (or invalidation) during its commit phase making conflict detection lazy [23].…”

Section: Featuresmentioning

confidence: 99%

A comparative analysis of STM approaches to reduction operations in irregular applications

Pedrero

Gutiérrez

Romero

et al. 2016

Journal of Computational Science

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As a recently consolidated paradigm for optimistic concurrency in modern multicore architectures, Transactional Memory (TM) can help to the exploitation of parallelism in irregular applications when data dependence information is not available up to runtime. This paper presents and discusses how to leverage TM to exploit parallelism in an important class of irregular applications, the class that exhibits irregular reduction patterns. In order to test and compare our techniques with other solutions, they were implemented in a software TM system called ReduxSTM, that acts as a proof of concept. Basically, ReduxSTM combines two major ideas: a sequential-equivalent ordering of transaction commits that assures the correct result, and an extension of the underlying TM privatization mechanism to reduce unnecessary overhead due to reduction memory updates as well as unnecesary aborts and rollbacks. A comparative study of STM solutions, including ReduxSTM, and other more classical approaches to the parallelization of reduction operations is presented in terms of time, memory and overhead.

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Conflict Detection in Hardware Transactional Memory

Cited by 2 publications

References 31 publications

Migration in Hardware Transactional Memory on Asymmetric Multiprocessor

Migration in Hardware Transactional Memory on Asymmetric Multiprocessor

A comparative analysis of STM approaches to reduction operations in irregular applications

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