Configuration caching management techniques for reconfigurable computing

Abstract

Although run-time reconfigurable systems have been shown to achieve very high performance, the speedups over traditional microprocessor systems are limited by the cost of configuration of the hardware. In this paper, we explore the idea of configuration caching, and create some of the first cache management algorithms for reconfigurable systems. We present techniques to carefully manage the configurations present on the reconfigurable hardware throughout program execution. Through the use of the presented strategies, we show that the number of required reconfigurations is reduced, lowering the configuration overhead. We extend these techniques to a number of different FPGA programming models, and develop both lower bound and realistic caching algorithms for these structures. Our simulation results show about a factor of 5 overhead reduction can be achieved over the commercial FPGA structures.

Stream Computations Organized for Reconfigurable Execution

“…To minimize delay, the goal would be to group together states which typically execute together, so as to minimize the frequency of state transitions that cross the CP boundary. In their work on configuration caching, Li et al [48] developed a clustering operation which attacks a problem very close to the area-and IO-bound state packing problem that would be necessary for the general CP mapping case.…”

Configuration Sharing to Reduce Reconfiguration Overhead Using Static Partial Reconfiguration

“…Their hardware reconfigurability allows limited resources to perform multiple functions, and satisfies both flexibility and performance. Although reconfiguration overhead in most RAs is reported serious [1]- [3], configuring a kernel and executing it thousands of times could amortize the overhead. However, in RAs that have relatively small number of resources just like coarse-grained RAs, some loops cannot be implemented at one time due to lack of available resources and need to be divided and to be configured repeatedly [4].…”

Cost-Driven Hybrid Configuration Prefetching for Partial Reconfigurable Coprocessor

“…These studies include configuration compression [6] and configuration caching [7]. Another promising technique that has been studied is configuration prefetching [5] [4].…”