Conductance-to-Current-Ratio-Based Parameter Extraction in MOS Leakage Current Models

Ortíz‐Conde, A.; Sucre-González, Andrea; Torres‐Torres, Reydezel; Molina, Joel; Murphy‐Arteaga, Roberto S.; Sánchez, F.J. Garcı́a

doi:10.1109/ted.2016.2597964

Cited by 12 publications

(7 citation statements)

References 13 publications

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“…The I g currents in the forward direction through a thin insulator layer in the case of their significant (by 1–3 orders of magnitude) excess over the backward currents can be determined by a combination of several mechanisms at once: the resistive current through filaments/shunts in the dielectric, thermionic emission (TE) of charge carriers, direct interband tunneling, trap-assisted tunneling (TAT), emission from traps using the Poole-Frenkel (PF) mechanism, and the injection tunneling by Fowler-Nordheim (FN) mechanism. The relative contributions of these mechanisms depend on the layer thickness and electric field strength in the dielectric, as well as its temperature and defects, and can be extracted in various ways from the analysis of field and temperature dependences [ 30 ].…”

Section: Discussionmentioning

confidence: 99%

“…Naturally, the analysis of normalized differential conductance (NDC) gives a better approximation of the linear dependence for high voltages ( Figure 7 a) for a “direct” drain current with a smaller area and, accordingly, with a lower probability of the contribution of random defects in two coordinates of the abscissa axis 1/V and V 1/2 [ 30 ]. The intersection of the linear approximation with the ordinate axis at NDC = 0.9 corresponds to the Poole-Frenkel mechanism (NDC = 1) for the electron transport through the built-in insulator (See Figure S4c,d , Supplementary Materials ) [ 30 , 31 ]. The value NDC = 0.16 for the x -axis in the V 1/2 coordinates has an overestimated NDC value instead of the expected value NDC = 0, which corresponds to the thermionic emission of electrons at lower voltages V g ( Figure 7 b).…”

Section: Discussionmentioning

confidence: 99%

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Diode-Like Current Leakage and Ferroelectric Switching in Silicon SIS Structures with Hafnia-Alumina Nanolaminates

et al. 2021

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Silicon semiconductor-insulator-semiconductor (SIS) structures with high-k dielectrics are a promising new material for photonic and CMOS integrations. The “diode-like” currents through the symmetric atomic layer deposited (ALD) HfO2/Al2O3/HfO2… nanolayers with a highest rectification coefficient 103 are observed and explained by the asymmetry of the upper and lower heterointerfaces formed by bonding and ALD processes. As a result, different spatial charge regions (SCRs) are formed on both insulator sides. The lowest leakages are observed through the stacks, with total Al2O3 thickness values of 8–10 nm, which also provide a diffusive barrier for hydrogen. The dominant mechanism of electron transport through the built-in insulator at the weak field E < 1 MV/cm is thermionic emission. The Poole-Frenkel (PF) mechanism of emission from traps dominates at larger E values. The charge carriers mobility 100–120 cm2/(V s) and interface states (IFS) density 1.2 × 1011 cm−2 are obtained for the n-p SIS structures with insulator HfO2:Al2O3 (10:1) after rapid thermal annealing (RTA) at 800 °C. The drain current hysteresis of pseudo-metal-oxide-semiconductor field effect transistor (MOSFET) with the memory window 1.2–1.3 V at the gate voltage |Vg| < ±2.5 V is maintained in the RTA treatment at T = 800–900 °C for these transistors.

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Section: Discussionmentioning

confidence: 99%

Section: Discussionmentioning

confidence: 99%

Diode-Like Current Leakage and Ferroelectric Switching in Silicon SIS Structures with Hafnia-Alumina Nanolaminates

et al. 2021

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“…[14][15][16] However, upon the hot implantation with fluences F > 2 Â 10 16 cm À2 , a G-band of graphite appears in the Raman-scattering UV spectra of the siliconoxide hetero borders. [16] The possibility of using hot implantation to form COII getters in bulk silicon or SOI structures requires additional research work.…”

Section: Discussion Of the Electrical Properties Of Si And Soi With A...mentioning

confidence: 99%

“…Hot implantation of SOI structures with UT dielectric layers allows one to form the source drains and back gates of double-gate SOI transistors and reduce the defect concentration. [14][15][16] However, upon the hot implantation with fluences F > 2 Â 10 16 cm À2 , a G-band of graphite appears in the Raman-scattering UV spectra of the siliconoxide hetero borders. [16] The possibility of using hot implantation to form COII getters in bulk silicon or SOI structures requires additional research work.…”

Section: Discussion Of the Electrical Properties Of Si And Soi With A...mentioning

confidence: 99%

“…The depth-dropping profiles of the fluorine and chlorine atoms, as well as the 16 O isotope deficiency in the upper silica layer, are associated with the thermochemical processing of the wafers prior to the SIMS measurements. Attention is paid to the high content of hydrogen atoms and the low content of carbon atoms, %10 19 cm À3 , in the SiO 2 layers, and this also corresponds to the data in Figure 2b, where the C atoms mainly migrate to the heteroborders without remaining at the path depth in silicon dioxide.…”

Section: Properties Of Si Substrate With a Gettermentioning

confidence: 99%

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Thermally Robust High‐Resistance Layers on Low‐Resistance Silicon Synthesized by Molecular CO⁺ Ion Implantation

Popov

Tarkov

Tikhonenko

et al. 2021

Physica Status Solidi (a)

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Using nanoscale inclusions of a wide‐band SiC semiconductor and SiO2 dielectric formed in CO+ molecular ion‐implanted (COII) layers allows creating highly resistive regions inside a moderate‐doped silicon substrate. Contrary to the well‐known implanted proton or argon‐ion insulation, where the high resistance is provided by the unstable radiation defect Fermi‐level pinning, such two‐type antidots form a bend of the silicon bandgap on the heteroboundaries around them, similar to the insulating layer in the p−n junction, and guarantee the absence of mobile charge carrier transport at a certain concentration of antidots and working temperatures below 400 K. These insulating regions save their properties even after hard thermal treatment (1400 K). Moreover, a gas blistering suppression is observed for the silicon‐on‐insulator (SOI) wafers with an ultrathin (10–40 nm) buried oxide (BOX). SIMS measurements demonstrate the strong mobile impurity accumulation at the COII region during subsequent thermal treatments.

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Threshold Voltage Extraction Using Conductance–Voltage Method for Nano‐Organic/Oxide Thin‐Film Transistors: Comparative Study of P‐ and N‐Type Devices

Pream Krishna,

Agarwal

2024

Physica Status Solidi (a)

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Threshold voltage is an essential component for a transistor to operate properly. In this work, an alternate technique for obtaining the threshold voltage, which is referred to as the conductance–voltage method, is suggested. In this technique, the threshold voltage is estimated by measuring the change in drain current with an applied gate voltage when the device transits from the weak accumulation to the strong accumulation mode of operation. The 2D simulations are then used to apply this strategy to pentacene‐based and amorphous indium‐gallium‐zinc‐oxide‐based thin‐film transistors (TFTs) in their linear region of operation. These seem promising, and the technique offers a useful tool for enhancing the functionality of complementary organic/oxide TFTs in the future.

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Conductance-to-Current-Ratio-Based Parameter Extraction in MOS Leakage Current Models

Cited by 12 publications

References 13 publications

Diode-Like Current Leakage and Ferroelectric Switching in Silicon SIS Structures with Hafnia-Alumina Nanolaminates

Diode-Like Current Leakage and Ferroelectric Switching in Silicon SIS Structures with Hafnia-Alumina Nanolaminates

Thermally Robust High‐Resistance Layers on Low‐Resistance Silicon Synthesized by Molecular CO⁺ Ion Implantation

Threshold Voltage Extraction Using Conductance–Voltage Method for Nano‐Organic/Oxide Thin‐Film Transistors: Comparative Study of P‐ and N‐Type Devices

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Conductance-to-Current-Ratio-Based Parameter Extraction in MOS Leakage Current Models

Cited by 12 publications

References 13 publications

Diode-Like Current Leakage and Ferroelectric Switching in Silicon SIS Structures with Hafnia-Alumina Nanolaminates

Diode-Like Current Leakage and Ferroelectric Switching in Silicon SIS Structures with Hafnia-Alumina Nanolaminates

Thermally Robust High‐Resistance Layers on Low‐Resistance Silicon Synthesized by Molecular CO+ Ion Implantation

Threshold Voltage Extraction Using Conductance–Voltage Method for Nano‐Organic/Oxide Thin‐Film Transistors: Comparative Study of P‐ and N‐Type Devices

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Product

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Thermally Robust High‐Resistance Layers on Low‐Resistance Silicon Synthesized by Molecular CO⁺ Ion Implantation