Computational complexity in logic testing

Sziray, Jozsef

doi:10.1109/ines.2010.5483865

2010 IEEE 14th International Conference on Intelligent Engineering Systems 2010

DOI: 10.1109/ines.2010.5483865

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Computational complexity in logic testing

Jozsef Sziray¹

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2011

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Simulink Library Development and Implementation for VLSI Testing in Matlab

Singh

2011

High Performance Architecture and Grid Computing

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Abstract. In ATPG, faults in the VLSI circuits are detected with D-algorithm, SPODEM and FAN algorithms. This paper gives the emphasis on presenting first two algorithms in MATLAB. Implementation of these algorithms for complex VLSI circuits is very tedious job. So an environment in Simulink is presented here, which is further verified on some benchmark circuits. Simulink provides an environment for intellectual properties (IP) building block based circuit engineering design as well as project simulation environment. In PODEM the requirement is the exact values of Controllability and Observability. For effective and fast calculation of COM, Simulink based designed models are used.

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Simulink Library Development and Implementation for VLSI Testing in Matlab

Singh

2011

High Performance Architecture and Grid Computing

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Computational complexity in logic testing

Cited by 1 publication

References 10 publications

Simulink Library Development and Implementation for VLSI Testing in Matlab

Simulink Library Development and Implementation for VLSI Testing in Matlab

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