Compressed Sensing by Phase Change Memories: Coping with Encoder non-Linearities

Paolino, Carmine; Antolini, Alessio; Pareschi, Fabio; Mangia, Mauro; Rovatti, Riccardo; Scarselli, Eleonora Franchi; Gnudi, Antonio; Setti, Gianluca; Canegallo, R.; Carissimi, Marcella; Pasotti, M.

doi:10.1109/iscas51556.2021.9401176

Cited by 5 publications

(2 citation statements)

References 18 publications

(17 reference statements)

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“…This paper presents a peripheral unit interfaced with a 128-kB embedded PCM (ePCM) array in a 90-nm STMicroelectronics CMOS technology, with the purpose of executing one-step MAC operations with both signed inputs and coefficients. The developed testchip is mainly intended to demonstrate a readout technique for non-linearity and time drift compensation, which differs from solutions based on empirical models and post-processing compensation [4], [5], [6]. Moreover, the unit is conceived to avoid any changes of the internal structure of the memory.…”

Section: Introductionmentioning

confidence: 99%

An embedded PCM Peripheral Unit adding Analog MAC In-Memory Computing Feature addressing Non-linearity and Time Drift Compensation

Antolini

Lico

Scarselli

et al. 2022

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)

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This paper presents an integrated peripheral unit interfaced to an embedded Phase-change Memory (ePCM) macrocell, with the aim of adding Analog In-memory Computing (AIMC) feature without any modifications to the internal structure of the memory array. The testchip has been designed and manufactured in a 90-nm STMicroelectronics CMOS technology. The unit allows the execution of signed Multiply and Accumulate (MAC) operations at the edge of the memory array exploiting the physical characteristics of memory devices. I-V characteristic non-linearity and transconductance time drift of PCM cells are overcome through a regulated bitline readout circuitry with time-coded inputs, along with a drift compensation technique based on a conductance ratio. Measurements results show 1-σ accuracy of 95.56% in MAC operations, whose decrease in time is roughly negligible at room temperature and is less than 1% after 24 hours at 85°C bake.

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Section: Introductionmentioning

confidence: 99%

An embedded PCM Peripheral Unit adding Analog MAC In-Memory Computing Feature addressing Non-linearity and Time Drift Compensation

Antolini

Lico

Scarselli

et al. 2022

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)

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“…A popular application of PCM technology is Analog In-memory Computing [4], [5], where it enables the compact storage of coefficients while providing means to compute matrix operations within the memory block. A PCM device This document has been created in the context of the StorAIge project.…”

Section: Introductionmentioning

confidence: 99%

Phase-Change Memory in Neural Network Layers with Measurements-based Device Models

Paolino

Antolini

Pareschi

et al. 2022

2022 IEEE International Symposium on Circuits and Systems (ISCAS)

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The search for energy efficient circuital implementations of neural networks has led to the exploration of phasechange memory (PCM) devices as their synaptic element, with the advantage of compact size and compatibility with CMOS fabrication technologies. In this work, we describe a methodology that, starting from measurements performed on a set of real PCM devices, enables the training of a neural network. The core of the procedure is the creation of a computational model, sufficiently general to include the effect of unwanted nonidealities, such as the voltage dependence of the conductances and the presence of surrounding circuitry. Results show that, depending on the task at hand, a different level of accuracy is required in the PCM model applied at train-time to match the performance of a traditional, reference network. Moreover, the trained networks are robust to the perturbation of the weight values, up to 10% standard deviation, with performance losses within 3.5% for the accuracy in the classification task being considered and an increase of the regression RMS error by 0.014 in a second task. The considered perturbation is compatible with the performance of state-of-theart PCM programming techniques.

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Phase Change Memories in Smart Sensing Solutions for Structural Health Monitoring

Quqa

Antolini

Scarselli

et al. 2022

J. Comput. Civ. Eng.

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Compressed Sensing by Phase Change Memories: Coping with Encoder non-Linearities

Cited by 5 publications

References 18 publications

An embedded PCM Peripheral Unit adding Analog MAC In-Memory Computing Feature addressing Non-linearity and Time Drift Compensation

An embedded PCM Peripheral Unit adding Analog MAC In-Memory Computing Feature addressing Non-linearity and Time Drift Compensation

Phase-Change Memory in Neural Network Layers with Measurements-based Device Models

Phase Change Memories in Smart Sensing Solutions for Structural Health Monitoring

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