Comprehensive Variability Analysis in Dual-Port FeFET for Reliable Multi-Level-Cell Storage

Chatterjee, Swetaki; Thomann, Simon; Ni, Kai; Chauhan, Yogesh Singh; Amrouch, Hussam

doi:10.1109/ted.2022.3192808

Cited by 27 publications

(12 citation statements)

References 32 publications

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“…However, dual-port FeFET comes with its own challenges. In [7], we demonstrated that reading states from the BG compounds transistor variability despite the increase in the MW.…”

mentioning

confidence: 87%

“…γ BF is defined as the ratio of the equivalent series capacitance of BG, the channel, and the capacitance of the FG. In the case of the BG read, the electron channel is created close to the buried oxide layer (BOX) [7]. Generally, the BG oxide is thicker than the FG oxide, which results in γ BF greater than 1 and hence, MW BG increases.…”

Section: Dual-port Ferroelectric Fetmentioning

confidence: 99%

“…Variability in FeFETs severely affects the reliability of FeFET-based systems and the accuracy of the inference tasks that are being executed. In this section, we consider the sources of variability such as design-time variability, run-time variation, and inherent spatial variation of FE domains [7], [11], [40], [41]. The effect of these variability sources on FeFET-based circuits and systems is demonstrated in the following.…”

Section: Joint Variability Modelling Of Fefetmentioning

confidence: 99%

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Cross-Layer Reliability Modeling of Dual-Port FeFET: Device-Algorithm Interaction

Kumar

Chatterjee

Thomann

et al. 2023

IEEE Trans. Circuits Syst. I

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Today's data-centric applications are incompatible with the predominant compute-centric computer architectures. The small on-chip memories of compute-centric computer architecture demand many energy-costly data transfers exposing the von-Neumann bottleneck. The Ferroelectric Field-Effect Transistor (FeFET) is an emerging Non-Volatile Memory (NVM) technology enabling novel data-centric architectures that go far beyond von-Nuemann principles. FeFETs are very promising for a wide range of applications starting from on-chip memories to in-memory computing and even neuromorphic computing. Nevertheless, FeFET devices exhibit significant variations that can severely restrict their applicability. Temperature further exacerbates variation effects because it degrades ferroelectric parameters. Hence, it is indispensable to investigate and model design-time variations, run-time variations, and stochastic variations due to spatial fluctuation of ferroelectric domains under different temperatures. Dual-port FeFET has been recently proposed and demonstrated as novel structure that offers for the first time disturb-free read operation along with > 10 larger memory window (MW) compared to conventional FeFETs. However, all of the before-mentioned types of variations are amplified in such a new structure. In this work, the impact of temperature variation is analyzed for dual-port FeFETs for the first time in a cross-layer manner starting from the device level to the circuit/system levels and compared to conventional FeFET.We focus in our analysis on Hyperdimensional Computing (HDC), which is an emerging type of machine learning algorithm, that is being executed on top of FeFET-based in-memory circuits that perform efficient Hamming distance (i.e., similarity) computations. Through our cross-layer framework, we demonstrate the serious impact of variation on FeFET reliability despite the significant increase in the MW that dual-port FeFET offers. Even HDC is affected, despite its remarkable robustness against errors. All in all, our work reveals that a larger MW at the device level does not necessarily translate to benefits at the application level. Hence, investigating and modeling variability effects in a crosslayer manner is indispensable.

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“…However, dual-port FeFET comes with its own challenges. In [7], we demonstrated that reading states from the BG compounds transistor variability despite the increase in the MW.…”

mentioning

confidence: 87%

Section: Dual-port Ferroelectric Fetmentioning

confidence: 99%

Section: Joint Variability Modelling Of Fefetmentioning

confidence: 99%

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Cross-Layer Reliability Modeling of Dual-Port FeFET: Device-Algorithm Interaction

Kumar

Chatterjee

Thomann

et al. 2023

IEEE Trans. Circuits Syst. I

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“…For intermediate V TH states, the polarized domains can exist in any spatial orientation throughout the channel [25]. Also, due to the stochastic switching time of the FeFET, it can not be predicted the exact domains that might be switched even for the same pulse.…”

Section: Implementation a Modeling The Inherent Randomness In Fefetmentioning

confidence: 99%

“…To model the variability and randomness (inherent stochasticity) inside FeFET, we employ our in-hause TCAD-based framework as in [21], [25]. It enables us to directly evaluate the impact of random spatial fluctuation of the polarization through emulating the polarization charges (P FE ) with fixed charges (Q FIX ) at the HfO 2 -SiO 2 interface.…”

Section: Implementation a Modeling The Inherent Randomness In Fefetmentioning

confidence: 99%

Leveraging Ferroelectric Stochasticity and In-Memory Computing for DNN IP Obfuscation

Mankali

Rangarajan

Chatterjee

et al. 2022

IEEE J. Explor. Solid-State Comput. Devices Circuits

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With the emergence of the Internet of Things (IoT), deep neural networks (DNNs) are widely used in different domains, such as computer vision, healthcare, social media, and defense. The hardware-level architecture of a DNN can be built using an in-memory computing-based design, which is loaded with the weights of a well-trained DNN model. However, such hardware-based DNN systems are vulnerable to model stealing attacks where an attacker reverse-engineers and extracts the weights of the DNN model. In this work, we propose an energy-efficient defense technique that combines a Ferroelectric Field Effect Transistor (FeFET)-based reconfigurable physically unclonable function (PUF) with an in-memory FeFET XNOR to thwart model stealing attacks. We leverage the inherent stochasticity in the FE domains to build a PUF that helps to corrupt the neural network's weights when an adversarial attack is detected. We showcase the efficacy of the proposed defense scheme by performing experiments on graph-neural networks (GNNs), a particular type of DNN. The proposed defense scheme is a first of its kind that evaluates the security of GNNs. We investigate the effect of corrupting the weights on different layers of the GNN on the accuracy degradation of the graph classification application for two specific error models of corrupting the FeFET-based PUFs and five different bioinformatics datasets. We demonstrate that our approach successfully degrades the inference accuracy of the graph classification by corrupting any layer of the GNN after a small re-write pulse.

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An Ultracompact Single‐Ferroelectric Field‐Effect Transistor Binary and Multibit Associative Search Engine

Yin

Müller

Huang

et al. 2023

Advanced Intelligent Systems

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Content addressable memory (CAM) is widely used in associative search tasks due to its parallel pattern matching capability. As more complex and data‐intensive tasks emerge, it is becoming increasingly important to enhance CAM density for improved performance and better area efficiency. To reduce the area overheads, various nonvolatile memory (NVM) devices, such as ferroelectric field‐effect transistors (FeFETs), are used in CAM design. Herein, a novel ultracompact 1FeFET CAM design that enables parallel associative search and in‐memory hamming distance calculation is used, as well as a multibit CAM for exact search using the same CAM cell. The proposed CAM design leverages the 1FeFET1R structure, and compact device designs that integrate the series resistor current limiter into the intrinsic FeFET structure are demonstrated to turn the 1FeFET1R structure into an effective 1FeFET cell. A two‐step search operation of the proposed binary and multibit 1FeFET CAM array through both experiments and simulations is proposed, showing a sufficient sensing margin despite unoptimized FeFET device variation. In genome pattern matching applications, using the hyperdimensional computing paradigm, the design results in a 89.9× speedup and 66.5× improvement in energy efficiency over the state‐of‐the‐art alignment tools on GPU.

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Comprehensive Variability Analysis in Dual-Port FeFET for Reliable Multi-Level-Cell Storage

Cited by 27 publications

References 32 publications

Cross-Layer Reliability Modeling of Dual-Port FeFET: Device-Algorithm Interaction

Cross-Layer Reliability Modeling of Dual-Port FeFET: Device-Algorithm Interaction

Leveraging Ferroelectric Stochasticity and In-Memory Computing for DNN IP Obfuscation

An Ultracompact Single‐Ferroelectric Field‐Effect Transistor Binary and Multibit Associative Search Engine

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