Comprehensive die-level assessment of design rules and layouts

Ghaida, Rani S.; Badr, Yasmine; Gupta, Maneesha; Ning, Jin; Gupta, Puneet

doi:10.1109/aspdac.2014.6742867

Cited by 7 publications

(2 citation statements)

References 10 publications

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“…Ghaida and Gupta [6] propose DRE, a platform that comprehensively connects design rule alternatives to the automated synthesis of standard-cell library cells, and then to the power-performance-area envelope of standard-cell based layouts of small blocks. Subsequently, [7] extend the DRE approach to chip-level analyses. Badr et al [2] suggest a pattern matching-based design rule evaluation method, which is then applied to checking of routing within standard cells.…”

Section: Related Workmentioning

confidence: 99%

Evaluation of BEOL design rule impacts using an optimal ILP-based detailed router

Han

Kahng

Lee

2015

Proceedings of the 52nd Annual Design Automation Conference

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Continued technology scaling with more pervasive use of multipatterning has led to complex design rules and increased difficulty of maintaining high layout densities. Intuitively, emerging constraints such as unidirectional patterning or increased via spacing will decrease achievable density of the final place-and-route solution, worsening die area and product cost. However, no methodology exists for accurate assessment of design rules' impact on physical chip implementation. At the same time, this is a crucial need for early development of BEOL process technologies, particularly with FinFET or future vertical-device architectures where cell footprints can become much smaller than in bulk planar CMOS technologies. In this work, we study impacts of patterning technology choices and associated design rules on physical implementation density, with respect to cost-optimal design rule-correct detailed routing. A key contribution is an Integer Linear Programming (ILP) based optimal router (OptRouter) which considers complex design rules that arise in sub-20nm process technologies. Using OptRouter, we assess wirelength and via count impacts of various design rules (implicitly, patterning technology choices) by analyzing optimal routing solutions of clips (i.e., switchbox instances) extracted from post-detailed route layouts in an advanced technology.

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Section: Related Workmentioning

confidence: 99%

Evaluation of BEOL design rule impacts using an optimal ILP-based detailed router

Han

Kahng

Lee

2015

Proceedings of the 52nd Annual Design Automation Conference

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“…In recent years, it was used to model NoC router power, delay and area by Jeong et al [7]. Ghaida et al used the machine learning approach to predict design characteristics in up-coming technology nodes [5]. It was also employed to solve lithography hotspot detection problem and structured design placement [3] [15].…”

Section: Introductionmentioning

confidence: 99%

Accurate prediction of detailed routing congestion using supervised data learning

Cai

Zhou

2014

2014 IEEE 32nd International Conference on Computer Design (ICCD)

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Routing congestion model is of great importance in design stages of modern physical synthesis, e.g. global routing and routability estimation during placement. As the technology node becomes smaller, routing congestion is more difficult to estimate during design stages ahead of detailed routing. In this paper, we propose a framework using nonparametric regression technique in machine learning to construct routing congestion model. The constructed model can capture multiple factors and enables direct prediction of detailed routing congestion with high accuracy. By using this model in global routing, significant reduction of design rule violations and detailed routing runtime can be achieved compared with the model in previous work, with small overhead in global routing runtime and memory usage. 1

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Cohesive techniques for cell layout optimization supporting 2D metal-1 routing completion

Jo¹,

Ahn²,

Kim³

et al. 2018

2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC)

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Comprehensive die-level assessment of design rules and layouts

Cited by 7 publications

References 10 publications

Evaluation of BEOL design rule impacts using an optimal ILP-based detailed router

Evaluation of BEOL design rule impacts using an optimal ILP-based detailed router

Accurate prediction of detailed routing congestion using supervised data learning

Cohesive techniques for cell layout optimization supporting 2D metal-1 routing completion

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