Composite Lightweight Authenticated Encryption Based on LED Block Cipher and PHOTON Hash Function for IoT Devices

Al-Shatari, Mohammed; Hussin, Fawnizu Azmadi; Aziz, Azrina Abd; Rohmad, Mohd Saufy; Tran, Xuan‐Tu

doi:10.1109/mcsoc57363.2022.00030

Cited by 1 publication

(2 citation statements)

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“…These designs were synthesized on different hardware platforms and targeting different optimization goals. Several authenticated encryption architectures based on different composition methods were presented, including the latest designs in [10,21,[31][32][33][34][35]. However, some of them were synthesized and simulated on different platforms and others consume large amounts of logic resources when composing the encryption with the authentication.…”

Section: Introductionmentioning

confidence: 99%

“…The authors of [21,31] presented an authenticated encryption composed of an LED block cipher [38] and a PHOTON hash function [39], with the objective of reusing the common datapath functions and reducing the footprints. They achieved a considerable operating frequency and throughput; however, they could share only small parts of the datapath and achieved a low reduction rate of the footprints.…”

Section: Introductionmentioning

confidence: 99%

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IoT Edge Device Security: An Efficient Lightweight Authenticated Encryption Scheme Based on LED and PHOTON

Al-Shatari,

Hussin,

Aziz

et al. 2023

Applied Sciences

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IoT devices and embedded systems are deployed in critical environments, emphasizing attributes like power efficiency and computational capabilities. However, these constraints stress the paramount importance of device security, stimulating the exploration of lightweight cryptographic mechanisms. This study introduces a lightweight architecture for authenticated encryption tailored to these requirements. The architecture combines the lightweight encryption of the LED block cipher with the authentication of the PHOTON hash function. Leveraging shared internal operations, the integration of these bases optimizes area–performance tradeoffs, resulting in reduced power consumption and a reduced logic footprint. The architecture is synthesized and simulated using Verilog HDL, Quartus II, and ModelSim, and implemented on Cyclone FPGA devices. The results demonstrate a substantial 14% reduction in the logic area and up to a 46.04% decrease in power consumption in contrast to the individual designs of LED and PHOTON. This work highlights the potential for using efficient cryptographic solutions in resource-constrained environments.

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