Competitive Improvement of the Time Complexity to Encode Fractal Image: By Applying Symmetric Central Pixel of the Block

Ahadullah,; Sapar, Siti Hasana; Al-Saidi, Nadia M. G.; Said, Mohamad Rushdan Md.

doi:10.1109/access.2020.3044290

Cited by 2 publications

(1 citation statement)

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“…Owing to its popularity in digital archiving, FIC has been found in numerous applications such as character recognition [8], superresolution [9], watermarking [10,11], and digital signature embedding [12]. FIC also possesses other attractive features like good peak signal-to-noise ratio (PSNR) performance and simple decoding method [13][14][15][16][17][18]. However, FIC suffers one major drawback arising from the computational complexity of the algorithm.…”

Section: Introductionmentioning

confidence: 99%

Deep Pipeline Architecture for Fast Fractal Color Image Compression Utilizing Inter-Color Correlation

et al. 2022

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Fractal compression technique is a well-known technique that encodes an image by mapping the image into itself and this requires performing a massive and repetitive search. Thus, the encoding time is too long, which is the main problem of the fractal algorithm. To reduce the encoding time, several hardware implementations have been developed. However, they are generally developed for grayscale images, and using them to encode colour images leads to doubling the encoding time 3x at least. Therefore, in this paper, new high-speed hardware architecture is proposed for encoding RGB images in a short time. Unlike the conventional approach of encoding the colour components similarly and individually as a grayscale image, the proposed method encodes two of the colour components by mapping them directly to the most correlation component with a searchless encoding scheme, while the third component is encoded with a search-based scheme. This results in reducing the encoding time and also in increasing the compression rate. The parallel and deep-pipelining approaches have been utilized to improve the processing time significantly. Furthermore, to reduce the memory access to the half, the image is partitioned in such a way that half of the matching operations utilize the same data fetched for processing the other half of the matching operations. Consequently, the proposed architecture can encode a 1024x1024 RGB image within a minimal time of 12.2 ms, and a compression ratio of 46.5. Accordingly, the proposed architecture is further superior to the state-of-the-art architectures.INDEX TERMS Digital circuits, field programmable gate arrays, fractal colour image compression, parallel architectures, pipeline processing.

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