Competing failure mechanisms in thin films: Application to layer transfer

Abstract

We investigate the origin of transverse cracks often observed in thin films obtained by the layer transfer technique. During this process, two crystals bonded to each other containing a weak plane produced by ion implantation are heated to let a thin layer of one of the material on the other. The level of stress imposed on the film during the heating phase due to the mismatch of thermal expansion coefficients of the substrate and the film is shown to be the dominent factor in determining the quality of the transferred layer. In particular, it is shown that if the film is submitted to a tensile stress, the microcracks produced by ion implantation are not stable and deviate from the plane of implantation making the layer transfer process impossible. However, if the compressive stress exceeds a threshold value, after layer transfer, the film can buckle and delaminate, leading to transverse cracks induced by bending. As a result, we show that the imposed stress m -or equivalently the heating temperature-must be within the range − c Ͻ m Ͻ 0 to produce an intact thin film where c depends on the interfacial fracture energy and the size of defects at the interface between film and substrate.

Effect of stress state on wrinkle morphology

“…This results in patterns of corrugated peaks and valleys on the surface, which, depending on the exact nature of the buckling process, can result in wrinkles, 1 folds, 2 creases, 3 or delaminations. 4,5 Wrinkles-characterized by their smooth sinusoidal surface contour-have shown particular ability to form wellordered patterns with regular peak-to-peak spacing, consistent amplitude of deformation, and long-range pattern order.…”

Nanoscale Semiconductor “X” on Substrate “Y” – Processes, Devices, and Applications

“…[ 7 , 30 ] Although, production-scale layer transfer has not been demonstrated yet, preliminary works have shown that the process can work at the wafer-scale [ 31 , 32 ] through the proper understanding and optimization of the transfer parameters. [ 26 ] Another XoY fabrication process scheme involves the transfer and assembly of bottom-up semiconducting nanostructures, such as nanowires (NWs) to the desired substrates. Various NW assembly techniques including microfl uidic channel, [ 33 ] Langmuir Blodgett, [34][35][36] magnetic [ 37 ] or electric-fi eld alignment [ 38 , 39 ] have been demonstrated, although they are mainly limited to small-scales and often lack the desired uniformity.…”

“…In this regard, selective transfer techniques based on bottom-up and top-down fabricated nanostructures to both mechanically rigid and fl exible substrates have been widely explored in the past. One specifi c approach is the epitaxial layer transfer (ELT) technique, [23][24][25][26] where a rubber stamp is used to lift-off partially released structures from an epitaxial growth substrate followed by their transfer to a receiver substrate. The fi rst report of ELT dates back to 1975 when GaAs layers with micro-scale thicknesses were successfully transferred onto glass substrates for the fabrication of photocathodes and subsequently night vision goggles.…”

Fully Flexible GaN Light‐Emitting Diodes through Nanovoid‐Mediated Transfer

“…For example, the interface was highly stable for t Ti = 50 nm and t SiO2 = 300 nm, while full peel‐off occurred for the template with t Ti = 200 nm and t SiO2 = 200 nm. The peel‐off of the p‐GaN/In x Ga 1‐x N/SiO 2 /LT‐GaN layer stack at the LT‐GaN/Ti interface occurs like a sheet, exhibiting a typical aspect of compressively stressed peel‐off (see Supporting Information, Figure S13) . The typical t Ti and t SiO2 values used for device fabrication were 120 and 300 nm, respectively.…”