Comparing the Expressiveness of Timed Automata and Timed Extensions of Petri Nets

Srba, Jǐŕı

doi:10.1007/978-3-540-85778-5_3

Cited by 31 publications

(29 citation statements)

References 69 publications

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“…Then, using region automata, one can decide the inclusion between the untimed languages of two timed automata in exponential space. The exact complexity of these problems had not been characterized, and the problem was wrongly cited in the literature as being PSPACE in [1,19]. In this section, we prove that untimed language universality and inclusion are actually EXPSPACEcomplete.…”

Section: Language Inclusion and Universalitymentioning

confidence: 84%

“…We show that checking untimed language equivalence (and in fact language universality) is EXPSPACE-hard (and thus EXPSPACE-complete) for hierarchical systems and timed automata. We would like to mention that this problem has been wrongly cited in the literature as being in PSPACE for timed automata [1,19]. Our results are summarized in Table 1.…”

Section: Introductionmentioning

confidence: 80%

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A Comparison of Succinctly Represented Finite-State Systems

Brenguier

Göller

Sankur

2012

Lecture Notes in Computer Science

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Abstract. We study the succinctness of different classes of succinctly presented finite transition systems with respect to bisimulation equivalence. Our results show that synchronized product of finite automata, hierarchical graphs, and timed automata are pairwise incomparable in this sense. We moreover study the computational complexity of deciding simulation preorder and bisimulation equivalence on these classes.

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Section: Language Inclusion and Universalitymentioning

confidence: 84%

Section: Introductionmentioning

confidence: 80%

A Comparison of Succinctly Represented Finite-State Systems

Brenguier

Göller

Sankur

2012

Lecture Notes in Computer Science

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“…In this paper, we use his formalism for sequence diagrams but translate them into timed-arc Petri nets (TAPN), because of the annotated timing information. We chose Petri nets over timed automata [15] because of the simplicity to compose different Petri nets in parallel [16].…”

Section: Related Workmentioning

confidence: 99%

Sequence Diagram Test Case Specification and Virtual Integration Analysis using Timed-Arc Petri Nets

Sieverding¹,

Ellen²,

Battram³

2013

Electron. Proc. Theor. Comput. Sci.

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In this paper, we formally define Test Case Sequence Diagrams (TCSD) as an easy-to-use means to specify test cases for components including timing constraints. These test cases are modeled using the UML2 syntax and can be specified by standard UML-modeling-tools. In a component-based design an early identification of errors can be achieved by a virtual integration of components before the actual system is build. We define such a procedure which integrates the individual test cases of the components according to the interconnections of a given architecture and checks if all specified communication sequences are consistent. Therefore, we formally define the transformation of TCSD into timed-arc Petri nets and a process for the combination of these nets. The applicability of our approach is demonstrated on an avionic use case from the ARP4761 standard.

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“…However, despite the powerful modeling power of TA and its strong theoretical background, there are some subtle lacks that TA suffers from, which will be enumerated as follows. First, because of their low-level expressiveness, the size of the models for many practical systems might be unnecessarily huge [9]. Second, due to the explicit use of the invariants and constraints on the clocks, during the design of a model, inadvertent deadlocks may be injected into the model.…”

Section: Introductionmentioning

confidence: 99%

A new extension of activity networks for modeling and verification of timed systems

Motallebi¹,

Azgomi²,

MIRZAEI³

et al. 2013

Turk J Elec Eng & Comp Sci

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Stochastic activity networks (SANs) are a well-known petri net-based formalism used for the performance and dependability modeling of a wide range of systems. On the other hand, the growing complexity of timed systems makes it imperative to apply formal analysis techniques in the early stages of the system's development. Finding a suitable framework for the modeling, evaluation, and verification of these systems is still a great challenge. In this paper, we introduce a new formalism named timed activity networks (TANs), which are based on the activity networks that are the nondeterministic settings of the SANs. The advantages of TANs are 2-fold: 1) allowing the construction of more compact petri net-based models of timed systems and 2) allowing the assignment of time intervals to timed activities where the activity completion rates are marking-dependent, which makes TANs a better model for timed systems.Thanks to the presence of the input/output gates, TANs are capable of describing a situation whose specification using petri net-based formalisms was not practical, due to the naivety of the enabling and firing rules in these models. In addition, a great benefit of TANs is the similarity of their primitives and notations to ordinary SANs, which allows us to easily obtaining these 2 models from each other. Accordingly, SANs can be used for performance, and dependability modeling and evaluation, while TANs can be used for the model checking of timed systems. In this paper, we present the definitions, semantics, and model checking techniques of the proposed formalism. In order to model check TAN models, a transformation procedure is given for translating TAN models into the equivalent linear hybrid automaton, which can then be used with the existing techniques and tools.

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Comparing the Expressiveness of Timed Automata and Timed Extensions of Petri Nets

Cited by 31 publications

References 69 publications

A Comparison of Succinctly Represented Finite-State Systems

A Comparison of Succinctly Represented Finite-State Systems

Sequence Diagram Test Case Specification and Virtual Integration Analysis using Timed-Arc Petri Nets

A new extension of activity networks for modeling and verification of timed systems

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