Comparator-less PET data acquisition system using single-ended memory interface input receivers of FPGA

Abstract

In this study, we propose a linear field-programmable gate array (FPGA)-based charge measurement method by combining a charge-to-time converter (QTC) with a single-ended memory interface (SeMI) input receiver. The QTC automatically converts the input charge into a dual-slope pulse, which has a width proportional to the input charge. Dual-slope pulses are directly digitized by the FPGA input/output (I/O) buffers configured with SeMI input receivers. A proof-of-concept comparator-less QTC/SeMI data acquisition (DAQ) system, consisting of 132 energy and 33 timing channels, was developed and applied to a prototype brain-dedicated positron emission tomography (PET) scanner. The PET scanner consisted of 14 sectors, each containing 2 × 1 block detectors, and each block detector yielded four energy signals and one timing signal. Because a single QTC/SeMI DAQ system can receive signals from up to eight sectors, two QTC/SeMI DAQ systems connected using high-speed gigabit transceivers were used to acquire data from the PET scanner. All crystals in the PET block detectors, consisting of dual-layer stacked lutetium oxyorthosilicate (LSO) scintillation crystal and silicon photomultiplier arrays, were clearly resolved in the flood maps with an excellent energy resolution. The PET images of hot-rod, cylindrical, and two-dimensional Hoffman brain phantoms were also acquired using the prototype PET scanner and two QTC/SeMI DAQ systems.

Silicon photomultiplier signal readout and multiplexing techniques for positron emission tomography: a review

“…Early digitization of SiPM signals may allow for a better performance of the SiPM-based PET system by effectively preventing the accumulation of undesirable noises (i.e., dark count, after pulse, and optical crosstalk) and interference between the multiplexed SiPM elements [ 155 – 157 ]. In addition, the digital multiplexing based on field-programmable gate array (FPGA)-only signal digitization method [ 141 , 158 , 159 ] reduces the manufacturing cost of DAQ modules by eliminating waveform sampling-based DAQ that uses ADCs. However, a limited number of available FPGA input/output (I/O) ports should be considered when developing the DAQ module that incorporates the FPGA-only signal digitization method.…”

Development and Initial Results of a Brain PET Insert for Simultaneous 7-Tesla PET/MRI Using an FPGA-Only Signal Digitization Method

“…5). The operating principle is almost identical to the comparatorless non-gated QTC [43] and a gate is added to improve the energy linearity despite the circuit complexity. The gated QTC generates the output pulse, whose pulse width at the discharge phase is proportional to the input charge.…”

“…A total of 2,000,000 coincidence events were obtained and the photopeak events were used to evaluate the block detector performance. The flood map quality was assessed using the distance-to-width ratio (DWR) [43]. The energy resolution and CTR were evaluated after crystal identification.…”

“…For the reconstructed hot-rod phantom image, we delineated one-dimensional (1D) profiles for the three smallest hot-rods (i.e. 1.2, 1.6, and 2.4 mm) and subsequently measured peak-tovalley ratios (PVRs) [43] to evaluate the image quality.…”

“…The proposed FPGA-only DAQ system uses programmable ports to digitize analog PET signals by configuring ports with low-voltage differential signaling input receivers [38][39][40][41] or single-ended memory interface (SeMI) input receivers [42,43]. Therefore, compared to the ASIC, the FPGA-only DAQ system features a relatively high degree-of-freedom for designing the PET DAQ system.…”