Comparative Study on Power Gating Techniques for Lower Power Delay Product, Smaller Power Loss, Faster Wakeup Time

Abstract

The power gating is one of the most popular reduction leakage techniques. We make comparison among various power gating schemes in terms of power delay product, energy loss, and wake-up time using the 45-nm Predictive Technology Model. In my conclusion, the Dual-Switch Power Gating (DSPG) shows lower power delay product, smaller energy loss, faster wake-up time than the other power gating schemes such as the Single-Switch and Charge-Recycled Power Gating schemes. Based on these advantages, the DSPG is suggested in this paper as a viable candidate suitable to a fine-grain leakage control scheme, where logic blocks go in and out very frequently and shortly between the active and sleep modes.

Multi-Layer Approximate Computing

“…This has been a critical topic for some time, and researchers have invented a range of power optimization techniques to address the issue. Different technologies have used techniques such as Power[66], [85], [42] and Clock gating [47], [45] at the hardware level to Parallezing or pipeling [3] at the software level to optimize power. Dynamic Power management [68], [87] and Dynamic Voltage and Frequency Techniques [41], [12] are mainly used in modern systems.…”

“…7, VDD(Drain Voltage) is switched while VSS(Source Voltage) is provided directly to the entire chip. [85] examines several power gating approaches based on a variety of parameters and concludes that Dual-Switch Power Gating offers the most benefits. However, in order to maintain state and information during low power mode, all power gating systems require additional functionality.…”